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Technical Documents

Licensing terms

Open source technology licensing provides many advantages to the user. NOIRLab makes MONSOON Technology available through such a license agreement. Please be aware that while you are welcome to browse the technical material in this area, NOIRLab requires you to agree to the terms and conditions of the license before you begin building things based on the MONSOON designs. This requires you to sign the open source license agreement [1] and return this document to

National Optical-Infrared Astronomy Research Laboratory,
Attention Dr. David Sprayberry,
950 N. Cherry Ave,
Tucson, Arizona, 85719, USA.

Once you have agreed to the terms of use by returning a signed license agreement to NOIRLab we can supply you with the source documentation for the information you require.

Document numbering and structure

The documents that describe the MONSOON technology have a structure based on a document numbering system. The numbering system is identical between the Orange and Torrent versions of the technology. The only difference is that the prefix is changed.

MONSOON Orange document numbers start with a MNSN prefix. The Orange document structure graphic is here [2].

MONSOON Torrent document numbers start with a TRNT prefix. The Torrent document structure graphic is here [3].

Interface Control Documents

These documents control the function and state of inputs to and outputs from the modules that make up a MONSOON Image Acquisition System. There are four main module interfaces that are required to build a MONSOON system. These are:
 

DHE to Pixel Acquisition Node (PAN) computer.

The PAN is often generically called the data acquisition computer. This interface is governed by MONSOON Interface Control Document level 6. These interfaces are common to the Orange and Torrent systems.

ICD 6.0 MNSN-AD-01-0004 Generic DHE Interface Description [4] Rev 1.0
ICD 6.1 MNSN-AD-01-0005 DHE Interface Description [5] Rev 1.1

PAN to Instrument Control Computer (ICS).

This is the control and command interface for the image acquisition system. Levels 4 and 5 of the MONSOON Interface Control Documents define this interaction. These interfaces are common to the Orange and Torrent systems.

ICD 4.0 MNSN-AD-01-0004 Generic Pixel Service Communications Command Response and Data Stream Interface Description [6] Rev 1.1
ICD 5.0 MNSN-AD-01-0003 PAN Communications Command Response and Data Stream Interface Description [7] Rev 1.0
ICD 5.1 MNSN-AD-01-0007 PAN Run-time Configuration Setup and Operating Mode Definition Interface Description [8] Rev 1.0

PAN to Data Handling System (DHS).

The interface allows the transport of the pixel data and meta data from the acquisition computer (PAN) to an observatory data handling facility. ICD level 1 governs this interaction (which can be as simple as FITs file generation). These interfaces are common to the Orange and Torrent systems.
ICD 1.0 MNSN-AD-01-0001 Data Handling System [9] Rev 1.0
ICD 1.1 MNSN-AD-01-0012 Data Handling System Interface Status and Data Stream Description [10] Rev 1.0

Disclaimer

The manufacturing documents and files available on this site may not reflect the latest optimal configuration of the hardware modules. The documents on this site reflect the configuration of the last production run of the hardware and may not reflect work that was carried out post-production through engineering change orders.

At this point the three versions of the MONSOON Technology (Orange, DECam and Torrent) diverge in the way the hardware is used to implement the functionality. The following links will take you to the details of the hardware, software, and mechanical details of each implementation.

DECAM Technical Documents

The information contained in this archive are copies of the documentation data base that resides off-site.

The principal purpose of this local archive is to provide information valuable to CTIO personel for the maintenance and testing of the DECAM instrument detector controller system - MONSOON.

All documents carry their original Doc DB number and version so that they may be traced back to the original source.

Every effort is made to maintain the local copies up to date with the latest revisions however, I am not infallible (you may have guessed that). If you find a discrepancy between the documentation and reality please contact Peter Moore (pmoore_at_noao_dot_edu) so that a correction or update can be made.

General Information

6563-v1 Front End Electronics - Overview of fault reporting conditions [11]
5749-v2 Test station startup - To start PanView for module testing [12]
(Note that you need a clk board in crate slot 3 and/or a 12Ch Acq board in slot 6)


Useful links

Terri Shaws' DECam information page - Excellent source of information [13]
DECam System - Electronic Log [14]
DECam System - Telemetry viewer [15]
DECam System - Alarms Browser [16]
DECam System - SISPI web page [17]

 

DECAM Firmware

DECAM Firmware

General Documentation

355-v22 12 Channel Acquisition Board - How to program [18]
355-v22 12 Channel Acquisition Board - Firmware version history [19]
2299-v11 Clock and Bias Board - Firmware version history [20]

Zipped VHDL Sources

355-v22 12 Channel Acquisition Board - 2010_11_18_acq12_fw_408 [21]
2299-v11 Clock and Bias Board - CBv4.01 [22]
2878-v1 Master Control Board - mcbFull_V1.02 [23]
4080-v7 Master Control Board - MCB_HW1.2FW5.21 [24]

Loader Files

355-v22 12 Channel Acquisition Board - EEPROM image - ccdacq.mcs [25]
2299-v11 Clock and Bias Board - EEPROM image - CBv4.01.mcs [26]
2878-v1 Master Control Board - EEPROM Image - mcb_v1.02.mcs [27]
4080-v7 Master Control Board - EEPROM Image - MCB_v521.mcs [28]
4080-v7 Master Control Board - FPGA Image - MCB_v521.bit [29]

DECAM Hardware

General Information Sources

Electronics
5767-v2 Crates - Procedure - Installing or removing connections to front end crates [30]
4654-v2 Crates - Procedure - Type 1 crate disassembly directions [31]
4654-v2 Crates - Procedure - Type 2 and Heater crate disassembly directions [32]
6281-v1 Crates - Procedure - Installing or removing main boards to-from the crate [33]
6281-v1 Crates - Procedure - Installing or removing transition boards to-from the crate [34]
1781-v1 Crates - MS-Word Template - Circuit Board Repair Form [35]

Focal Plane
768-v37 Focal Plane - CCD to Crate and board mapping via VIB - VIB Technical Report [36]

Detectors
5998-v1 Focal Plane - CCD colours [37]
5998-v1 Focal Plane - CCD Name cross references [38]
5998-v1 Focal Plane - Focal plane CCD mapping [39]
5998-v1 Focal Plane - Focal plane CCD Serial numbers [40]

Useful Links

Gerber plot file viewers
Free online viewer - www.gerber-viewer.com [41]
Free download (after registration) - www.mccad.com/FREE_GerberViewer.html [42]

12 Channel Acquisition Board

User Guides

354-v14 12 Channel Acquisition Board - Users Manual [43]
354-v14 12 Channel Acquisition Board - Register map [44]

Hardware

3150-v9 12 Channel Acquisition Board - Schematics (with ECOs) [45]
3150-v9 12 Channel Acquisition Board - Gerber Plots [46]
3150-v9 12 Channel Acquisition Board - Bill Of Materials [47]

Firmware Loaders

355-v22 3480-v7 12 Channel Acquisition Board - EEPROM Loader Image - ccdacq.mcs [25]

Transition Board

3480-v7 12 Channel Acquisition Transition Board - Schematics (with ECOs) [48]
3480-v7 12 Channel Acquisition Transition Board - Gerber Plots [49]
3480-v7 12 Channel Acquisition Transition Board - Bill Of Materials [50]

Testing

1457-v2 12 Channel Acquisition Board - Test Procedures [51]
1458-v1 12 Channel Acquisition Board - Board Test acceptance Criteria [52]
1992-v1 12 Channel Acquisition Board - testing methods presentation August 2008 [53]

Test Results

4316-v2 12 Channel Acquisition Board - Production test results [54]
4317-v1 12 Channel Acquisition Transistion Board - Production test results [55]

Engineering Change Orders

3150-v9 12 Channel Acquisition Board - Changes [56]
2836-v2 12 Channel Acquisition Transition Board - Changes [57]
4345-v3 12 Channel Acquisition Board - ECO 1 - ADC DNL fix [58]
4346-v1 12 Channel Acquisition Board - ECO 2 - Power on bias enable fix [59]
4350-v1 12 Channel Acquisition Board - ECO 3 - VSub spike inhibit [60]
4940-v1 12 Channel Acquisition Board - ECO 4 - DAC range restriction [61]

Cables

12 Channel Acquisition Board

Each 12-Channel ACQ Transition Board has three cables which run between it and the VIB. The 16 pin cable carries the RTD signals, the 24 pin cable carries the video signals and CCD substrate voltage, and the 32 pin cable carries the bias voltages. For pinout information, see the 12-Channel Transition Module schematics (DOCdb 3480). For system connection map, see the VIB manual (DOCdb 768)

The Samtec part #s of the three cable types are:
    EEDP-016-14.80-DS1-RS2-1
    EEDP-024-14.80-DS1-RS2-1
    EEDP-032-14.80-DS1-RS2-1
    length is subject to change!!!
Connectors used on Transition Modules:
    MEC8-125-02-L-D-RA1
    MEC8-137-02-L-D-RA1
    MEC8-149-02-L-D-RA1
Connectors used on VIB:
    HSEC8-125-01-S-DV-A
    HSEC8-137-01-S-DV-A
    HSEC8-149-01-S-DV-A

912-v3 12 Channel Acquisition Board - Samtec cables [62]
912-v3 12 Channel Acquisition Board - Transition module connector [63]
912-v3 12 Channel Acquisition Board - VIB module connector [64]
912-v3 12 Channel Acquisition Board - Samtec cable part numbers [65]

Clock and Bias Board

Each Clock Transition Board has two cables which run between it and the VIB. The 60 and 80 pin cables carry the clock signals between the Clcok Transition ond the VIB connectionds to the CCDs. For pinout information, see the Clock Transition Module schematics (DOCdb 2907). For system connection map, see the VIB manual (DOCdb 768)

Samtec Part #s for the two types of Clock Board Cables
    HQDP-060-15.00-TTR-TED-1-B
    HQDP-080-15.00-TTR-TED-1-B
Samtec Part numbers of Clock Transition
    QSH-060-01-L-D-DP-A
    QSH-080-01-L-D-DP-A
Samtec Part numbers of VIB Connectors
    QSH-060-01-L-D-DP-A
    QSH-080-01-L-D-DP-A

916-v7 Clock and Bias Board - Samtec cable [66]
916-v7 Clock and Bias Board - Connectors [67]
916-v7 Clock and Bias Board - Samtec cable part numbers [68]

Kapton Cable

4208-v1 Kapton cable - Schematic [69]
4210-v1 Kapton cable - Gerbers [70]
4209-v1 Kapton cable - Bill Of Materials [71]

Clock and Bias Board

User Guides

1215-v3 Clock Board - Users Manual [72]

Hardware

2896-v8 Clock Board - Schematic (with ECOs) [73]
2896-v8 Clock Board - Gerber plots [74]
2896-v8 Clock Board - Bill Of Material [75]

Firmware Loaders

2420-v3 Clock Board - EEPROM Image file - CBv4.01.mcs [26]

Transition Boards

Clock Transition Board
2907-v5 Clock Transition Board - Schematics (with ECOs) [76]
2907-v5 Clock Transition Board - Gerber plots [77]

Clock Guider Transition Board
This is a special module constructed to fix a routing error on the VIB East. Clock groups A, B and C must drive G1S, G1S and G1N respectively. If a standard DECam Clock transition card is used with the Clock boards in the Guider backplane, clock group A drives G1S, G2S and G1N. This does not allow the algorithm flexibility required to drive the guiding system. Therefore, a special Clock Guider Transition module was designed.
6183-v2 Clock Guider Transition Board - Schematic [78]
6183-v2 Clock Guider Transition Board - Gerber plots [79]
6183-v2 Clock Guider Transition Board - Bill Of Material [80]

Testing

5359-v1 Clock Board - Clock board testing and preliminary acceptance criteria [81]
5359-v1 Clock Board - Test procedure [82]

Test Results

5358-v1 Clock Board - Production test results [83]

Engineering Change Orders

2896-v8 Clock Board - ECOs [84]
2907-v5 Clock Transition Board - ECOs [85]

Crate Controller

The Internal Crate Controller board (ICC) monitors the DES crate environment attributes including voltage, temperature, humidity, Vicor power supply cooling fan rotation detection, and crate cooling fan rotation detection. The ICC board will turn off the Vicor power supply, and notify the Instrument Control System, if any monitored attribute goes into a fault condition. The Instrument Control System can also interrogate the ICC to determine the cause of failure as well as force the ICC board to turn off the Vicor power supply.

User Guides

1527-v70 ICS Interface Host - Quick Start Guide [86]
1527-v70 ICS Interface Host - Users manual [87]
1527-v70 ICC - Firmware Description [88]
1527-v70 ICC - Register Mapping [89]
1527-v70 Fan RPM Board - Design Information [90]
1527-v70 Vicor - DAQ Crate power sequencing [91]
1527-v70 Vicor - Heater Crate power sequencing [92]

Hardware

1527-v70 - Crate Controller - Bill Of materials [93]
1527-v70 ICC Board - Schematic [94]
1527-v70 ICC Board - Gerber plots [95]
1527-v70 ICC Board - Layers [96]
4264-v1 ICC Board - Power Supply Overvoltage detection circuit modification [97]

1527-v70 Fan Load Board - Schematic [98]
1527-v70 Fan Load Board - Gerber plots [99]
1527-v70 Fan Load Board - Layers [100]

1527-v70 Fan RPM Board - Schematic [101]
1527-v70 Fan RPM Board - Gerber plots [102]
1527-v70 Fan RPM Board - Layers [103]

Testing

1527-v70 ICC - Board Checkout [104]

Crate Wiring

DECAM Crate Wiring Documentation

2328-v33 Production Crate - Schematic and description [105]
2328-v33 Production Crate - Bill Of Materials [106]
2328-v33 Production Crate - ICC Board Connector pinouts [107]
2328-v33 Production Crate - ICC Cable & Connector Bill Of Materials [108]
2328-v33 Production Crate - Cooling Fan Plenum Connector pinouts [109]
2328-v33 Production Crate - Power Supply Module Connector pinouts [110]

5740-v1 Production Crate - AC Power cable specification [111]
5739-v1 Production Crate - Crate grounding braid description [112]

1154-v9 Production Crate - Analog backplane connectors [113]

Heater Control Crate

DECam Heater Controls

User Guides

6026-v1 - Heater Controller - Users Manual [114]
6026-v1 - Heater Controller - Production version description [115]

Hardware

6026-v1 - Heater Controller - Heater driver board schematic [116]
6026-v1 - Heater Controller - Heater driver transition board schematic [117]
6026-v1 - Heater Controller - Heater patch panel board schematic [118]
6026-v1 - Heater Controller - Heater patch panel transition board schematic [119]

6026-v1 - Heater Controller - Heater driver Gerber plots [120]
6026-v1 - Heater Controller - Heater driver transition Gerber plots [121]
6026-v1 - Heater Controller - Heater patch panel Gerber plots [122]
6026-v1 - Heater Controller - Heater patch panel transition Gerber plots [123]

Mechanical

6026-v1 - Heater Controller - Heater driver front panel [124]
6026-v1 - Heater Controller - Heater driver transition front panel [125]
6026-v1 - Heater Controller - Heater patch panel front panel [126]
6026-v1 - Heater Controller - Heater patch panel transition front panel [127]

Master Control Board

User Guides

4080-v7 Master Control Board - Users manual [128]
4080-v7 Master Control Board - Register map [129]
3642-v1 - SLINK - Instalation Instructions [130]
3642-v1 - SLINK - Front view before modification [131]
3642-v1 - SLINK - Front view after modification [132]
3642-v1 - SLINK - Back view after modification [133]

Hardware

4080-v7 Master Control Board - Schematic (with ECOs) [134]
4080-v7 Master Control Board - Gerber plots [135]
4080-v7 Master Control Board - Bill Of Materials [136]
2509-v1 Master Control Board - Synchronization Slave wiring [137]

Firmware Loaders

4080-v7 Master Control Board - EEPROM Image file - mcb_v521.mcs [28]
4080-v7 Master Control Board - FPGA Image file - mcb_v521.bit [29]

Testing

Test Results

Engineering Change Orders

4080-v7 Master Control Board - ECO list [138]

Power Supply

User Guides

1380-v11 Vicor Filter Box - Description and Construction notes [139]
1380-v11 Vicor Filter Box - Operating and Service Manual [140]
4265-v1 Vicor Power Supply - Quick reference guide [141]
4674-v1 Vicor Power Supply - Hardware power supply sequencer [142]
6051-v1 AC Power Distribution Chassis - Hardware description [143]

Hardware

1380-v11 Vicor Filter Box - Schematic [144]
1380-v11 Vicor Filter Box - Voltage Monitor Divider circuits [145]
1380-v11 Vicor Filter Box - Gerber plots [146]
1380-v11 Vicor Filter Box - Layers [147]
1380-v11 Vicor Filter Box - Bill Of materials [148]
6051-v1 AC Power Distribution Chassis - Schematic [149]
6051-v1 AC Power Distribution Control Chassis - Schematic [150]
6051-v1 AC Power Distribution Control Chassis - Cable [151]

Mechanical

1380-v11 Vicor Filter Box - Drawings [152]
1380-v11 Vicor Filter Box - Mounting details [153]
6051-v1 AC Power Distribution Chassis - Fabrication drawings [154]

Testing

2343-v4 Vicor Power Supplies - Power up diagnostics [155]

Spares Inventory

DECAM at CTIO Spares Inventory

Mechanical
5771-v8 Mechanical spares as of 20th April 2012 - MS-Excel file [156]

Electronic
5771-v8 Electronic spares as of 7th November 2012 - MS-Excel file [157]

Detectors
(Pending)

Vacuum Interface Board

Vacuum Interface Boards

User Guides

768-v37 Vacuum Interface Board - User manual [158]
768-v37 Vacuum Interface Board - Technical Design Report [36]
768-v37 Vacuum Interface Board - CCD Position Mapping [159]

Photographs

2454-v1 VIB WEST - General views [160]
2454-v1 VIB WEST - Top view [161]
2454-v1 VIB WEST - Bottom view [162]
3301-v1 VIB-EAST - Top view [163]
3301-v1 VIB-EAST - Bottom view [164]

Hardware

2976-v2 VIB WEST - Schematic [165]
2978-v1 VIB WEST - Gerber plots [166]
2982-v1 VIB WEST - Layers [167]
3303-v1 VIB-EAST - Schematic [168]
3302-v1 VIB-EAST - Gerber plots [169]
3302-v1 VIB-EAST - edited solder mask - supercedes Gerber plots [170]
3302-v1 VIB-EAST - new bottom layer solder mask - supercedes Gerber plots [171]

Testing

2977-v3 Vacuum Interface Board - Checkout procedure [172]
2977-v3 VIB-WEST - Checkout worksheet [173]
2977-v3 VIB-EAST - Checkout worksheet [174]

DECAM Software

DECam Software

Sequencer Code Assembler

6167-v3 - Code Source - Asm4 [175]
6167-v3 - Code Source - Asm5 [176]

DECAM System Configuration Data

Orange Technical Documents

General Documents

MONSOON Orange Data Sheet [177] Rev 1.1
MNSN-AD-02-0001 Detector Head Electronics Architecture (DHE) [178]
MNSN-AD-02-0002 System Architecture [179]
MNSN-AD-03-0001 Operational Concepts Definition [180]
MNSN-AD-04-0001 Functional Performance Requirements [181]
MNSN-AD-08-0006 Glossary of terms [182] Rev 2.3

Orange DHE Interface Control Documents

The DHE is what is generically called a controller. This interface level is governed by the MONSOON Interface Control Documents (ICD) level 7 and 8. These documents control the hardware interfaces of the system.

Orange - ICD 7.0 MNSN-AD-01-0006 DHE Backplane Definition [183] Rev 13.1
Orange - ICD 7.1 MNSN-AD-01-0013 Requirements for the MCB Image Buffer Module (IBM) [184] Rev 2.0
Orange - ICD 8.4 MNSN-AD-01-0008 NEWFIRM to MONSOON [185] Rev 1.0

Documentation Index

MNSN-AD-10-0001 Master Documentation List [186] Rev 0

Orange Hardware

IMPORTANT NOTE:
Xilinx have released an end of life advisory for the Virtex-E FPGA component used in the MONSOON Orange architecture. A copy of the advisory can be found here [187]. Please consider your options for safeguarding against obsolescence.

The pages below provide access to detail information of the Orange hardware modules.

The hardware information is generally arranged as:
Hardware user manuals
Schematic diagrams
Assembly drawings
Layout packages
Bill of materials
Firmware loader products
Transition module components (Schematics, assembly drawings, layout packages, bill of materials)
Hardware test procedure documents

Note that to use this information for your own purposes (i.e. build it or use it as the basis of a new design) you must agree to the open source license agreement. The license terms can be found here [1].

Master Control Board (MCB)

MCB Users Guide

MNSN-AD-08-0001 MCB Description Document [188] Rev 4.2


MCB Hardware

MNSN-EL-02-1401 MCB Front Panel Detail [189] Rev 1
MNSN-EL-04-0001 MCB Assembly [190] Rev -A-
MNSN-EL-04-0001 MCB Assembly [191] Rev 2
MNSN-EL-04-2001 MCB Schematic Diagram [192] Rev -A-
MNSN-EL-04-3001 MCB Layout Package [193] Rev -A2-
MNSN-EL-04-4001-018 MCB Bill Of Materials [194] Rev -A1-
MNSN-EL-10-0400-018 MCB Top Assembly [195] Rev -A-


MCB Firmware Loader Products

Standard configuration
MNSN-EL-06-0071 MCB U20 Pixel FPGA - Fpga Loader [196] Rev 4.65 (mcbpixfpgav465.bit)
MNSN-EL-06-0071 MCB U26 Pixel FPGA - EEProm Loader [197] Rev 4.65 (McbPixFpgaV465.mcs)
MNSN-EL-06-0066 MCB U25 Sequencer FPGA - Fpga Loader [198] Rev 4.67 (mcbseqfpgav467.bit)
MNSN-EL-06-0066 MCB U22 Sequencer FPGA - EEProm Loader [199] Rev 4.67 (McbSeqFpgaV467.mcs)

Specific to QUOTA
MNSN-EL-06-0060 MCB U25 Sequencer FPGA - Fpga Loader [200] Rev 4.92 (McbSeqFpgaV492.bit)
MNSN-EL-06-0060 MCB U22 Sequencer FPGA - EEprom Loader [201] Rev 4.92 (McbSeqFpgaV492.mcs)

Specific to SLINK communications
MNSN-EL-06-0019 MCB U20 Pixel FPGA - Fpga Loader [202] Rev 4.62 (mcbpixfpgav462.bit)
MNSN-EL-06-0019 MCB U26 Pixel FPGA - EEProm Loader [203] Rev 4.62 (McbPixFpgaV462.mcs)
MNSN-EL-06-0018 MCB U25 Sequencer FPGA - Fpga Loader [204] Rev 4.62 (mcbseqfpgav462.bit)
MNSN-EL-06-0018 MCB U22 Sequencer FPGA - EEProm Loader [205] Rev 4.62 (McbSeqFpgaV462.mcs)


MCB Test Procedure

MNSN-TS-01-0003 MCB Testing Procedure [206] Rev 0


Image Buffer Module (IBM) - Daughter board for use with NEWFIRM

Image Buffer Schematic Diagram [207]
MNSN-AD-01-0013 ICD 7.1 Image Buffer Module Requirements [208] Rev 2

Systran Documents

Systran SL100 SL240 Catalog sheet [209]
Systran PCI Hardware reference manual [210]
Systran CMC Hardware reference manual [211]
Systran Flow control design note [212]

S-LINK Documents

S-LINK MCB Hardware modifications [213]
S-LINK specifications [214]
S-LINK NOAO email to Miquel [215]

S-LINK FILAR Description [216]
S-LINK FILAR userguide [217]
S-LINK FILAR schematics [218]
S-LINK FILAR Bill of Materials [219]

S-LINK HOLA userguide [220]
S-LINK HOLA schematics [221]
S-LINK HOLA Bill of Materials [222]

Clock and Bias Board (CBB)

CBB Users Guide

MNSN-AD-08-0003 CBB Description [223] Rev 1.3

CBB Hardware

MNSN-EL-02-1301 CBB Front Panel Detail [224] Rev 1
MNSN-EL-04-0008 CBB Assembly [225] Rev 2
MNSN-EL-04-0008 CBB Assembly [226] Rev -A-
MNSN-EL-04-2008 CBB Schematic Diagram [227] Rev 1
MNSN-EL-04-2008 CBB Schematic Diagram [228] Rev A1
MNSN-EL-04-2008-003 CBB NEWFIRM Schematic Diagram [229] Rev 2
MNSN-EL-04-2008-007 CBB DECAM Schematic Diagram [230] Rev 2
MNSN-EL-04-3008 CBB Layout Package [231] Rev -A-
MNSN-EL-04-4008-017 CBB Bill of Materials [232] Rev A2
MNSN-EL-04-4008-001 CBB Bill of Materials [233] Rev 3
MNSN-EL-04-4008-001 CBB Bill of Materials [234] Rev 4
MNSN-EL-04-4008-003 CBB NEWFIRM Bill of Materials [235] Rev 3
MNSN-EL-10-0300-017 CBB Top Assembly [236] Rev -A-
MNSN-EL-10-0300-003 CBB NEWFIRM Top Assembly [237] Rev 2
MNSN-EL-10-0300-007 CBB DECAM Top Assembly [238] Rev 1

CBB Firmware Loader Products

Standard configuration
MNSN-EL-06-0034 CBB U118 Sequencer CPLD - Cpld Loader [239] Rev 4.01 (ClkBiasSeqCpldV401.jed)
MNSN-EL-06-0061 CBB U119 Configuration CPLD - Cpld Loader [240] Rev 4.30 (ClkBiasCfgCpldV43.jed)
MNSN-EL-06-0067 CBB U116 FPGA - Fpga Loader [241] Rev 4.40 (ClkBiasFpgaV44.bit)
MNSN-EL-06-0067 CBB U200 FPGA - EEProm Loader [242] Rev 4.40 (ClkBiasFpgaV44.mcs)

Specific to QUOTA
MNSN-EL-06-0062 CBB U116 FPGA - Fpga Loader [243] Rev 4.92 (ClkBiasFpgaV492.bit)
MNSN-EL-06-0062 CBB U200 FPGA - EEProm Loader [244] Rev 4.92 (ClkBiasFpgaV492.mcs)

CBB Transition Boards

MNSN-EL-04-0007 CBB Transition ORION Test Set Assembly [245]
MNSN-EL-04-0010 CBB Transition Generic Assembly [246] Rev 1
MNSN-EL-04-0010 CBB Transition Generic Assembly [247] Rev -A-
MNSN-EL-04-0016 CBB Transition QUOTA Assembly [248] Rev -OD-
MNSN-EL-04-2007 CBB Transition ORION Test Set Schematic Diagram [249]
MNSN-EL-04-2010 CBB Transition Generic Schematic Diagram [250] Rev 1
MNSN-EL-04-2010 CBB Transition Generic Schematic Diagram [251] Rev -A-
MNSN-EL-04-2016 CBB Transition QUOTA Schematic Diagram [252] Rev -OD-
MNSN-EL-04-4007 CBB Transition ORION Test Set Bill Of Materials [253] Rev 1
MNSN-EL-04-4010 CBB Transition Generic Bill of Materials [254] Rev 2
MNSN-EL-04-4010 CBB Transition Generic Bill of Materials [255] Rev -A-
MNSN-EL-04-4016 CBB Transition QUOTA Bill of Materials [256] Rev 1
MNSN-EL-04-3007 CBB Transition ORION Layout Package [257] Rev 1
MNSN-EL-04-3010 CBB Transition Generic Layout Package [258] Rev -A-
MNSN-EL-04-3016 CBB Transition QUOTA Layout Package [259] Rev -0D-
NFM-EL-04-0006 CBB Transition NEWFIRM Assembly [260] Rev 1
NFM-EL-04-2006 CBB Transition NEWFIRM Schematic Diagram [261] Rev 1
NFM-EL-04-4006 CBB Transition NEWFIRM Bill of Materials [262] Rev 1

CBB Testing Procedure

MNSN-TS-01-0004 CBB Testing Procedure [263] Rev 2

Infrared Acquisition Boards (IRACQ)

IRACQ Users Guide

MNSN-AD-08-0002 IR Acquisition Board Description Rev 0 - Pending revision

IRACQ Hardware

MNSN-EL-02-1101 IRACQ Front Panel Detail [264]
MNSN-EL-02-1102 IRACQ Front Panel Detail [265] Rev 1
MNSN-EL-04-0004 IRACQ Motherboard Assembly [266] Rev -A1-
MNSN-EL-04-0004 IRACQ Motherboard Assembly [267] Rev -B-
MNSN-EL-04-0005 IRACQ Daughterboard Assembly [268] Rev -B-
MNSN-EL-04-0005 IRACQ NEWFIRM Daughterboard Assembly [269] Rev -A-
MNSN-EL-04-2004 IRACQ Motherboard Schematic Diagram [270] Rev -A1-
MNSN-EL-04-2004 IRACQ Motherboard Schematic Diagram [271] Rev -B-
MNSN-EL-04-2005 IRACQ Daughterboard Schematic Diagram [272] Rev -A-
MNSN-EL-04-2005 IRACQ Daughterboard Schematic Diagram [273] Rev -B-
MNSN-EL-04-3004 IRACQ MotherBoard Layout Package [274] Rev -B-
MNSN-EL-04-3005 IRACQ Daughterboard Layout Package [275] Rev -B-
MNSN-EL-04-4004-001 IRACQ Motherboard Bill of Material [276] Rev -A1-
MNSN-EL-04-4004-010 IRACQ Motherboard Bill of Materials [277] Rev -B-
MNSN-EL-04-4005-001 IRACQ Daughterboard Bill of Materials [278] Rev -A1-
MNSN-EL-04-4005-010 IRACQ Daughterboard Bill of Materials [279] Rev -B-
MNSN-EL-10-0100-001 IRACQ NEWFIRM Top Assembly [280] Rev -A1-
MNSN-EL-10-0100-010 IRACQ Top Assembly [281] Rev -B-

IRACQ Firmware Loader Products

Revision -A- Hardware
MNSN-EL-06-0069 IRACQ U55 FPGA - Fpga Loader [282] Rev 4.16 (IrAcqFpgaV416.bit)
MNSN-EL-06-0069 IRACQ U95 FPGA - EEProm Loader [283] Rev 4.16 (IrAcqFpgaV416.mcs)
MNSN-EL-06-0026 IRACQ CPLDS - Cpld Loader [284] Rev 4.00 (IRAcqCpldV40.jed)

Revision -B- Hardware
MNSN-EL-06-0070 IRACQ U20 FPGA - Fpga Loader [285] Rev 4.21 (iracqfpgav421.bit)
MNSN-EL-06-0070 IRACQ U95 FPGA - EEProm Loader [286] Rev 4.21 (IrAcqFpgaV421.mcs)
MNSN-EL-06-0058 IRACQ CPLDS - Cpld Loader [287] Rev 4.10 (IrAcqCpldV41.jed)

IRACQ Transition Boards

MNSN-EL-04-0012 IRACQ Transition WHIRC Top Assembly [288] Rev -A-
MNSN-EL-04-0012 IRACQ Transition WHIRC Readme [289] Rev -A-
MNSN-EL-04-1012 IRACQ Transition WHIRC Assembly [290] Rev -A-
MNSN-EL-04-2012 IRACQ Transition WHIRC Schematic Diagram [291] Rev -A-
MNSN-EL-04-3012 IRACQ Transition WHIRC Layout Package [292] Rev -A-
MNSN-EL-04-4012 IRACQ Transition WHIRC Bill of Materials [293] Rev -A-
MON3000-0053 IRACQ Transition ORION Test Set Schematic Diagram [294] Rev 1
MON3000 0054 IRACQ Transition ORION Test Set Assembly [295] Rev 1
MON3000 0055 IRACQ Transition ORION Test Set Bill of Materials [296] Rev 1
NFM-EL-04-0005 IRACQ Transition NEWFIRM Assembly [297] Rev 1
NFM-EL-04-2005 IRACQ Transition NEWFIRM Schematic Diagram [298] Rev 1
NFM-EL-04-4005 IRACQ Transition NEWFIRM Bill of Materials [299] Rev 1

IRACQ Test procedure

MNSN-TS-01-0005 IRACQ Acquisition Board Testing [300] Rev 0

CCD Acquisition Board (CCDACQ)

CCDACQ User Guide

MNSN-AD-08-0004 CCDACQ Description [301] Rev 1.2

CCDACQ Hardware

MNSN-EL-02-1501 CCDACQ Front Panel Detail [302] Rev 1
MNSN-EL-04-0002 CCDACQ Assembly [303] Rev -B-.
MNSN-EL-04-1002 CCDACQ Fabrication detail [304] Rev -B-
MNSN-EL-04-2002 CCDACQ Schematic Diagram [305] Rev -B1-
MNSN-EL-04-3002 CCDACQ Layout Package [306] Rev -B4-
MNSN-EL-04-4002 CCDACQ Bill of Materials [307] Rev -B2-

CCDACQ Firmware Loader Products

Standard configuration
MNSN-EL-06-0052 CCDACQ CPLD - Cpld Loader [308] Rev 4.10 (ccdAcqCpldV41.jed)
MNSN-EL-06-0068 CCDACQ U68 FPGA - Fpga Loader [309] Rev 4.12 (ccdacqfpgav412.bit)
MNSN-EL-06-0068 CCDACQ U143 FPGA - EEProm Loader [310] Rev 4.12 (ccdacqfpgav412.mcs)

Specific to QUOTA
MNSN-EL-06-0063 CCDACQ U68 FPGA - Fpga Loader [311] Rev 4.95 (ccdacqfpgav495.bit)
MNSN-EL-06-0063 CCDACQ U143 FPGA - EEProm Loader [312] Rev 4.95 (ccdacqfpgav495.mcs)

Transition Boards

MNSN-EL-04-0009 CCDACQ Transition Generic Assembly [313] Rev 1
MNSN-EL-04-0015 CCDACQ Transition QUOTA Assembly [314] Rev -OD-
MNSN-EL-04-2009 CCDACQ Transition Generic Schematic Diagram [315] Rev 1
MNSN-EL-04-2015 CCDACQ Transition QUOTA Schematic Diagram [316] Rev -OD-
MNSN-EL-04-3009 CCDACQ Transition Generic Layout Package [317] Rev 1
MNSN-EL-04-3015 CCDACQ Transition QUOTA Layout Package [318] Rev -0D-
MNSN-EL-04-4009 CCDACQ Transition Generic Bill of Materials [319] Rev 2
MNSN-EL-04-4015 CCDACQ Transition QUOTA Bill of Materials [320] Rev 1

CCDACQ Testing Procedure

MNSN-TS-01-0002 CCDACQ Testing Procedures [321] Rev 3.1

Power Fan Out Board

This board is used to connect the Orange transition modules to the analog power sources. This power penetrates the Orange backplane via connector P3 and is independent of the backplane power system. The available designs provide for a right and left handed distribution that corresponds to the position of the bus master slot (MCB slot).

Left Hand Variant
MNSN-EL-04-0003 PWRFAN Left Hand Top Assembly [322]
MNSN-EL-04-1003 PWRFAN Left Hand Fabrication Detail [323]
MNSN-EL-04-2003 PWRFAN Left Hand Schematic Diagram [324]
MNSN-EL-04-3003 PWRFAN Left Hand Layout Package [325]

Right Hand Variant
MNSN-EL-04-0006 PWRFAN Right Hand Top Assembly [326] Rev -A-
MNSN-EL-04-1006 PWRFAN Right Hand Fabrication Detail [327] Rev -A-
MNSN-EL-04-2006 PWRFAN Right Hand Schematic Diagram [328] Rev -A-
MNSN-EL-04-3006 PWRFAN Right Hand Layout Package [329] Rev -A-

Power Supplies

The MONSOON Orange system does not specify a specific power supply solution since it is designed as an expandable system. By definition this precludes having a single power supply design. However, there is one power supply solution that have been used successfully at NOIRLab. The following files give information about the 30 Watt 'Wall Mount' supply..

30 Watt 'Wall Mount' power supply - Suitable for a minimal CCD system in a 4-slot or 6-slot chassis.
MNSN-EL-05-0003 Power Supply Chassis Wiring Diagram [330] Rev -B-
MNSN-EL-05-0004 Power Supply Cables [331] Rev -B-
MNSN-EL-05-0014 Power Supply Wall Mount [332] Rev 1
MNSN-EL-05-0015 Power Supply Wall Mount Wiring List [333] Rev -OD-
MNSN-EL-02-0011 Power Supply Wall Mount Bill of Materials [334] Rev -OD-
MNSN-EL-02-1016 Power Supply Wall Mount Delay Board Fabrication Detail [335]
 

Chassis Wiring

Chassis wiring is dependent on the physical implementation details. The documents given here are representative of the wiring we use at NOIRLab to achieve optimum performance from the system. They may be used as a reference for future designs.

MNSN-EL-05-0002 Chassis Wiring Diagram With Terminal Blocks [336]
MNSN-EL-05-0005 Chassis Wiring Diagram With Out Terminal Blocks [337] Rev -A-
MNSN-EL-05-0008 Chassis Wiring Grounding Scheme Bench Spectrograph [338] Rev -OD-

Orange Software

General Documentation

MNSN-AD-08-0005 MONSOON Software Setup [339] Rev 2.1
MON-0000-0016 PAN Software Design Document [340] Rev 1.0
MON-0000-0016 PAN Software Design Note [341] Rev 1.0
MONSOON Library API [342] Rev 1.0
MONSOON Supervisor Layer Software Design [343]
 

Instrument Specific Documents

MNSN-AD-08-0010 Operating Instructions for WIYN Bench Spectrograph [344] Rev 2
MNSN-AD-08-0011 Operating Instructions for QUOTA [345] Rev 0
 

Sequencer Assembler Sources

MONSOON Orange Assembler [346] Rev 4.0
MONSOON Orange Assembler [347] Rev 5.0
MONSOON Orange Assembler [348] Rev 6.0
 

Pan Software NOIRLab-North TarBall download

DownLoad link - Removed since server died, please contact technical representative

Pan Software NOIRLab-South TarBall download

DownLoad link - Removed since server died, please contact technical representative

 

Orange Firmware

General Documentation

MNSN-EL-06-9500 FIRMWARE Quick Guide [349] Rev 1.8
MNSN-EL-06-9500 FIRMWARE History [350]
MONSOON Existing Firmware Products [351] as at 20080827

Zipped VHDL Sources

Master Control Board (MCB)
MNSN-EL-06-0018 MCB Source McbSeqFpgaV462 [352] Rev 4.62
MNSN-EL-06-0060 MCB Source McbSeqFpgaV492 [353] Rev 4.92
MNSN-EL-06-0065 MCB Source McbSeqFpgaV465 [354] Rev 4.65
MNSN-EL-06-0066 MCB Source McbSeqFpgaV467 [355] Rev 4.67

MNSN-EL-06-0019 MCB Source McbPixFpgaV462 [356] Rev 4.62
MNSN-EL-06-0064 MCB Source McbPixFpgaV464 [357] Rev 4.64
MNSN-EL-06-0071 MCB Source McbPixFpgaV465 [358] Rev 4.65

Clock and Bias Board (CBB)
MNSN-EL-06-0034 CBB Source ClkBiasSeqCpldV401 [359] Rev 4.01
MNSN-EL-06-0037 CBB Source ClkBiasFpgaV42 [360] Rev 4.20
MNSN-EL-06-0061 CBB Source ClkBiasCfgCpldV43 [361] Rev 4.30
MNSN-EL-06-0062 CBB Source ClkBiasFpgaV492 [362] Rev 4.92
MNSN-EL-06-0067 CBB Source ClkBiasFpgaV44 [363] Rev 4.40

IR Acquisition Board (IRACQ)
MNSN-EL-06-0026 IRACQ REV -A- ALL CPLDS Source IRAcqCpldV40 [364] Rev 4.00
MNSN-EL-06-0027 IRACQ REV -A- Source IRAcqFpgaV413 [365] Rev 4.13
MNSN-EL-06-0069 IRACQ REV -A- Source IRAcqFpgaV416 [366] Rev 4.16

MNSN-EL-06-0058 IRACQ REV -B- ALL CPLD Source IRAcqCpldV41 [367] Rev 4.10
MNSN-EL-06-0028 IRACQ REV -B- Source IRAcqFpgaV42 [368] Rev 4.20
MNSN-EL-06-0070 IRACQ REV -B- Source IRAcqFpgaV421 [369] Rev 4.21

CCD Acquisition Board (CCDACQ)
MNSN-EL-06-0052 CCDACQ Source CcdAcqCpldV41 [370] Rev 4.10
MNSN-EL-06-0063 CCDACQ Source CcdAcqFpgaV495 [371] Rev 4.95
MNSN-EL-06-0068 CCDACQ Source CcdAcqFpgaV412 [372] Rev 4.12

Templates
Template - Bus Interface [373]
Template - Personality Module [374]

Orange Mechanical

Transition Board Extraction Tool

MNSN-EL-02-0005 Extraction Tool Assembly [375]
MNSN-EL-02-1008 Extraction Tool Detail [376]

Power Supply Chassis

MNSN-EL-02-0007 Power Supply Chassis Assembly Drawing [377]
MNSN-EL-02-0008 Power Supply Chassis Bill of Materials [378]
MNSN-EL-02-0011 Power Supply Chassis Bill of Materials [379] Rev -OD-
MNSN-EL-02-1011 Power Supply Chassis Detail Front Panel Modification [380]
MNSN-EL-02-1012 Power Supply Chassis Detail Side Panel Modifications [381] Rev 2
MNSN-EL-02-1013 Power Supply Chassis Detail Back Panel Modifications [382]
MNSN-EL-02-1014 Power Supply Chassis Detail Shelf Modifications [383]
MNSN-EL-02-1015 Power Supply Chassis Detail Cover Modifications [384]
MNSN-EL-02-1016 Power Supply Chassis Detail Delay and Resistor Board [385]

Six Slot Chassis

MNSN-EL-02-0003 6-Slot Generic Assembly Drawing [386]
MNSN-EL-02-0004 6-Slot Generic Parts List [387]
MNSN-EL-02-0006 6-Slot FHIRE Parts Lis [388]t
MNSN-EL-02-1003 6-Slot Generic Detail Panel Left Side Modification [389] Rev -A-
MNSN-EL-02-1010 6-Slot Generic Detail Label TBLK Arrangement [390]
MNSN-EL-02-1017 6-Slot Generic Detail Mounting Bracket Dual Fan [391]
MNSN-EL-02-1018 6-Slot Generic Detail Temporary Back Panel [392] Rev -A-
MNSN-EL-02-1019 6-Slot Generic Detail Panel Right Side Modification [393]
MNSN-EL-02-1020 6-Slot Generic Detail Horizontal Rail Modification [394] Rev -A-
MNSN-EL-02-1021 6-Slot Generic Detail Threaded and Insulation Strip Modifications [395] Rev -A-
MNSN-EL-02-1059 6-Slot Chassis Detail Rear Panel [396] Rev -OD-
MNSN-EL-02-1060 6-Slot Chassis Detail Front Panel [397] Rev -A-
 

Twelve Slot Chassis

MNSN-EL-02-0002 12-Slot Generic Parts List [398]
MNSN-EL-02-0004 12-Slot Generic Detail Mounting Rails Power Supply [399]
MNSN-EL-02-1001 12-Slot Generic Detail Fan Exhaust [400]
MNSN-EL-02-1002 12 Slot Generic Detail Rail G-10 Cage [401]
MNSN-EL-02-1004 12-Slot Chassis Detail Chassis Support Bar [402]
MNSN-EL-02-1005 12-Slot Generic Detail Mounting Plate Power Supply Filters [403]
MNSN-EL-02-1006 12-Slot Generic Detail Inner Side Panel With Fan Cutout [404]
MNSN-EL-02-1007 12-Slot Generic Detail Outer Side Panel With Fan Cutout [405]
MNSN-EL-02-1009 12-Slot Generic Detail Horizontal Rail Card Cage [406]

Orange System Configuration Data

These system configuration data packages can be used as templates for future instrument configuration sets. They are offered 'as is' without any warranty as to their operational state or suitability of purpose to other implementations.

Configuration _bert [407] - Used as a test bed for various testing schemes.
Configuration _ccdBrdTest [408]  - Facilitates testing of the CCDACQ board hardware
Configuration _clkBrdTest [409] - Facilitates testing of the CBB hardware
Configuration _fred [410] - Generic 'always works' test bed for system development
Configuration _iracqBrdTest [411] - Facilitates testing the IRACQ board hardware
Configuration _labTest [412] - Laboratory test system configuration
Configuration _mcbBrdTest [413] - Facilitates testing the MCB hardware
Configuration _mnsnBrdTest [414] - For use with the board test software
Configuration _mosaic1 [415] - Configuration code running 8 E2V detectors at prime focus on Mayall telescope.
Configuration _NEWFIRM_Tucson [416] - Current 4k x 4k IR imager configuration data set
Configuration _ota [417] - Used to characterize the OTA detectors during development for the WIYN ODI instrument
Configuration _pcmTest [418] - My own personal 'I trust this' configuration data set
Configuration _qGde [419] - ??
Configuration _quota [420] - WIYN QUOTA focal plane configuration for science readout
Configuration _quota_guide [421] - WIYN QUOTA focal plane setup optimized for fast guiding role
Configuration _tom [422] - General purpose test system (early).

Torrent Technical Documents


General Documentation

Torrent Data Sheet [423] Rev 4.1
TRNT-AD-11-0001 Torrent DHE Architecture [424] Rev 5.0
TRNT-AD-11-0001 Torrent Performance Requirements [425] Rev 0.0
TRNT-AD-04-0001 Torrent DHE Compliance Tests [426] Rev 2.5
TRNT-AD-04-0002 Report on Torrent DHE Compliance Tests [427] Rev 1.0

Torrent DHE Interface Control Documents

The DHE is what is generically called a controller. This interface level is governed by the MONSOON Interface Control Documents (ICD) level 7 and 8. These documents control the hardware interfaces of the system.

Torrent  - ICD 7.? TRNT-AD-01-0001 AFE-CCD Circuit Board Dimensions [428] Rev -OD-
Torrent  - ICD 7.3 TRNT-AD-01-0003 Torrent DHE LCB to AFE Interface Description [429] Rev 0.0
Torrent  - ICD 7.4 TRNT-AD-01-0004 Torrent DHE PSM to LCB Interface Description [430] Rev 0.0
Torrent  - ICD 7.6 TRNT-AD-01-0006 Torrent DHE PSM to TSM Interface Description [431] Rev 0.0

System Configuration User Questionair

Torrent User Survey [432] Rev 4 - Used to specify the details of a buildable configuration for a Torrent DHE

Documentation Index

TRNT-AD-10-0001 Master Documentation List [433] Rev 0

Torrent Hardware

The relationship between the various hardware modules of the Torrent DHE is shown here [434] in the DHE interconnect diagram.

The controlled grounding scheme for the Torrent DHE can be found here [435]

Torrent DHE Hardware Description Guide - Covers all Torrent electronics.
TRNT-AD-08-0007 DHE Hardware Description [436] Rev 1.1

The pages below provide access to the schematic and assembly information of the Torrent hardware modules.

The information on these pages is generally arranged as:

Assembly drawings
Schematic diagrams
Layout packages
Bill of materials
Firmware loader products
Testing Procedures

Note that to use this information for your own purposes (i.e. build it or use it as the basis of a new design) you must agree to the open source license agreement. The license terms can be found here [1].

Local Control Board (LCB)

Local Control Board
TRNT-EL-04-0002 LCB Top Assembly [437] Rev -B-
TRNT-EL-04-1002 LCB Fabrication Detail [438] Rev -B-
TRNT-EL-04-2002 LCB Schematic Diagram [439] Rev -B-
TRNT-EL-04-3002 LCB Layout Package [440] Rev -B-
TRNT-EL-04-4002 LCB Bill of Materials [441] Rev -B-

Firmware Loader Products

TRNT-EL-06-0001 LCB FPGA - Fpga Loader [442] Rev 2.22 (torrentfpga_ver222.bit)
TRNT-EL-06-0001 LCB FPGA - EEprom Loader [443] Rev 2.22 (torrentfpga_ver222.mcs)

LCB Testing Procedures
TRNT-TS-01-0003 LCB Test Procedure [444] Rev 0

Local Control Board Mezzanine (LCB-MEZ)

TRNT-EL-04-0003 LCB-MEZ Top Assembly [445] Rev -A3-
TRNT-EL-04-1003 LCB-MEZ Fabrication Detail [446] Rev -A-
TRNT-EL-04-2003 LCB-MEZ Schematic Diagram [447] Rev -A4-
TRNT-EL-04-3003 LCB-MEZ Layout [448] Rev -A-
TRNT-EL-04-3003 LCB-MEZ Layout Package [448] Rev -A-
TRNT-EL-04-4003 LCB-MEZ Bill of Materials [449] Rev -A5-

Power Supply Module (PSM)

TRNT-EL-04-0001 PSM Top Assembly [450] Rev -B-
TRNT-EL-04-1001 PSM Fabrication Detail [451] Rev -B-
TRNT-EL-04-2001 PSM Schematic Diagram [452] Rev -B-
TRNT-EL-04-3001 PSM Layout Package [453] Rev -B-
TRNT-EL-04-4001 PSM Bill of Materials [454] Rev -B-

CCD Analog Front End (AFE)

CCD Analog Front End
TRNT-EL-04-0004 AFE-CCD Top Assembly [455] Rev -C-
TRNT-EL-04-1004 AFE-CCD Fabrication Detail [456] Rev -C-
TRNT-EL-04-2004 AFE-CCD Schematic Diagram [457] Rev -C1-
TRNT-EL-04-3004 AFE-CCD Layout [458] Rev -C1-
TRNT-EL-04-4004 AFE-CCD Bill of Materials [459] Rev -C1-

Analog Front End Calibration Worksheet
AFE-CCD Calibration Worksheet [460]

Analog Front End Extender Board
TRNT-EL-04-0008 AFE-EXT Circuit Board Dimensions [461] Rev -OD-
TRNT-EL-04-1008 AFE-EXT Fabrication Detail [462] Rev -OD-
TRNT-EL-04-2008 AFE-EXT Schematic Diagram [463] Rev -0D-
TRNT-EL-04-3008 AFE-EXT Layout [464] Rev -OD-

Analog Front End Testing Procedures
TRNT-TS-01-0004 AFE-CCD Test Procedure [465] Rev 0

Transition Module (TSM)

Transition Module Preamplifier for CCD (TSM-CCD)

TRNT-EL-04-0007 TSM-CCD Top Assembly [466] Rev -C1-
TRNT-EL-04-1007 TSM-CCD Fabrication Detail [467] Rev -C-
TRNT-EL-04-2007 TSM-CCD Schematic Diagram [468] Rev -C1-
TRNT-EL-04-4007 TSM-CCD Bill of Materials [469] Rev -C1-

TRNT-EL-04-0007 TSM-CCD Top Assembly [470] Rev -B-
TRNT-EL-04-1007 TSM-CCD Fabrication Detail [471] Rev -B-
TRNT-EL-04-2007 TSM-CCD Schematic Diagram [472] Rev -B-
TRNT-EL-04-3007 TSM-CCD Layout [473] Rev -B-
TRNT-EL-04-4007 TSM-CCD Bill of Materials [474] Rev -B-

Transition Module Utility Board (TSM-UTIL)
TRNT-EL-04-0009 TSM-UTIL Top Assembly [475] Rev -A1-
TRNT-EL-04-1009 TSM-UTIL Fabrication Detail [476] Rev -A-
TRNT-EL-04-2009 TSM-UTIL Schematic Diagram [477] Rev -A2-
TRNT-EL-04-3009 TSM-UTIL Layout [478] Rev -A-
TRNT-EL-04-3009 TSM-UTIL Layout Package [479] Rev -A-
TRNT-EL-04-4009 TSM-UTIL Bill of Materials [480] Rev -A4-

Transition Module Utility Board Testing Procedures
TRNT-TS-01-0005 TSM-UTIL Test Procedure [481] Rev 0

CCD Flex Circuits (CCD-FLEX)

Video Flex
TRNT-EL-04-0005 CCD-FLEX-VID Top Assembly [482] Rev -A-
TRNT-EL-04-1005 CCD-FLEX- [483]VID [482] Fabrication Detail [483] Rev -A-
TRNT-EL-04-2005 CCD-FLEX- [484]VID [482] Schematic Diagram [484] Rev -A-
TRNT-EL-04-3005 CCD-FLEX- [485]VID [482] Layout Package [485] Rev -A-

Clock and Bias Flex
TRNT-EL-04-0006 CCD-FLEX-CB Top Assembly [486] Rev -A-
TRNT-EL-04-1006 CCD-FLEX-CB Fabrication Detail [487] Rev -A-
TRNT-EL-04-2006 CCD-FLEX- [488]CB [486] Schematic Diagram [488] Rev -A-
TRNT-EL-04-3006 CCD-FLEX- [489]CB [486] Layout [489] Rev -A-

Cables

TRNT-EL-03-0001 CBL PSM to TSM-UTIL Connector [490]
TRNT-EL-03-0002 CBL TSM-UTIL to Shutter and Preflash Connector [491]
TRNT-EL-03-0003 CBL GIGe Ethernet Shield Wire [492]
TRNT-EL-03-0006 CBL TSM Chassis Ground Wire [493]

Torrent Software

MONSOON/Torrent Software Setup Guide
MNSN-AD-08-0005 MONSOON Software Setup Guide [494] Rev 2.1

Torrent Software Description
TRNT-AD-08-0001 Torrent Software System Description [495] Rev 0

Acquisition Software Client
TRNT-AD-08-0002 borg and mborg clients [496] Rev 0

System Configuration Tools
TRNT-AD-08-0006 Software User Manual [497] Rev 0

Attribute Extraction Tool
TRNT-AD-08-0003 Assimilate [498] Rev 1.2

Attribute Collector Tool
TRNT-AD-08-0004 Collector [499] Rev 1.1

Torrent Sequencer description
TRNT-AD-08-0012 Torrent Sequencer Description [500] Rev 0

Sequencer Assembler
Torrent assembler [501] Rev 6.0

Calibration eeprom format information

Calibration EEPROM Description

The calibration EEPROMs for Torrent systems are contained on each of the component electronics boards. A fully populated Torrent system will have five Calibration EEPROMs, four in the Controller box and one in the TSM box. There is one EEPROM on the LCB, one on the PSM and one on each of the AFE boards.

These EEPROMs are currents arranged as 128 pages of 16 words each 32 bits wide. Pages 0 and 1 are ID pages that contain information to identify and help verify the data stored in the EEPROM.

Data stored in the EEPROMS is all integer values. Where a floating point value is desired we store the value as int( value * 1000 ) This limits the range of values that can be stored to -2,147,483.000 to 2,147,483.000. We could not think of any requirement that required a greater range

A copy of the data in the EEPROMs for each system is kept in a set of EEPROM Mirror Files stored in the $MONSOON_CFG/_sysName configuration directory for the system. Changing out a DHE Controller will require obtaining the correct mirror files for the new controller from the Torrent configuration database

EEPROM ID Page 0 Structure

EEPROM Page 0 Layout
Word # Word Name Board Default Value Long Name Comments
0 PSTORFORMAT ALL 0x00000001 EEPROM Storage Format The Code for the Format of the data stored in this EEPROM (1)
1 MDLIDCODE LCB 0x00000010 Module ID Code The code number assigned to the LCB boards (16)
    PSM 0x00000020   The code number assigned to the PSM boards (32)
    CCD AFE 0x00000040   The code number assigned to the CCD AFE boards (64)
    IR AFE 0x00000050   The code number assigned to the IR AFE boards (80)
    TSM Utility 0x00000030   The code number assigned to the IR AFE boards (48)
2 MDLVARCODE ALL 0x00000001 Module Variant Code The Variant ## of a board that differs from a standard board (1)
3 MDLREVNUM ALL 0x00000001 Module Release Number The release number for the module being read all still at release 1
4 MDLSERNUM ALL 0x0000xxxx Module Serial number The serial number of this board. Currently not in use
5 SYSFPGACODE ALL 0x000000CC System FPGA Code Version The FPGA code version used to write this EEPROM Currently 204
6 - 15 Not Used ALL 0x00000000 Not Used Locations Reserved

 

EEPROM ID Page 1 Structure

EEPROM Page 1 Layout
Word # Word Name Board Default Value Long Name Comments
0 MDLLASTTESTDATE ALL 20090316 Module's Last Test Date The date of the last time this board was tested (various)
1 LASTWRTDATE ALL 20110318 EEPROM Last Written Date The date of the last time this EEPROM was written (various)
2 VLDPAGECNT ALL 0x00000005 Valid Page Count The number of pages in the EEPROM that contain Valid Data (various)
3 - 11 Not Used ALL 0x00000000 Not Used Locations Reserved
12 - 15 CRC0 - CRC3 ALL 7FE163FB6 CRC code portion 0 - 3 The 128 byte representation of the MD5Sum calculated on the Data in all valid pages excepting Page 1 words 12 through 15 (various)

Setting up a System Configuration Data Set

Setting up a system configuration data set

This is a basic guide to setting up a system configuration from scratch ...

In big-boy

1. run bldMNSN

  to setup distribution directory structure

2. run assimilate -version 207 -sysName mySystemName

  -version points to the version of firmware that is in the hardware
  -sysName points to a common directory of form 
  /MNSN/soft_dev/cfg/_mySystemName/.dscFiles and
  /MNSN/soft_dev/cfg/_mySystemName/.eep
  which are used to contain the Torrent specific configuration files

3. run arrayDesc -type genericdetectorType -arrayID thisDetectorName -fpName mySystemName for as many detectors that make up the focal plane, changing the -arrayID value for each one.

  -type identifies a generic detector description
     currently available types are 
        e2v44-82
        e2v231-84
        lbnl234
        STA1042
  -arrayID is the unique identifier for this detector, usually the serial number or a positional key
  -fpName is the system configuration name

Format of attributes set by the sysName.ini file created by collector

see file big-boy:/MNSN/soft_dev/Torrent_Text/sysName.ini.tmplt

The values in the template file will be replaced by the "collector" with values read from the system TSM eeprom

Format of attributes set by the sysName_DefaultSetup.mod file created by collector

see file big-boy:/MNSN/soft_dev/Torrent_Text/sysName_DefaultSetup.mod.tmplt

The values in the template file will be replaced by the "collector" with values read from the system TSM eeprom.

Standard Definitions for Sequencer Code

User Interface, PAN Code and Sequencer Handling for Regions of Interest (ROI) readout

Reading out Regions of Interest (ROI) for CCD focal planes can be extremely complex. The inter-connection between number of outputs per detector, number and orientation of detectors and pixel binning can result in scenarios that are too complex for the simple sequencer processing available in MONSOON/Torrent systems.

Four user attributes are used to describe a region of interest. These attributes are all described by pixel positions or counts given assuming no binning is being done. The values loaded down to the sequencer are modified to take into account any requested binning values.

  • roiRow - This attribute gives the starting row of the ROI in unbinned rows
  • roiCol - This attribute gives the starting column of the ROI in unbinned pixels
  • roiRSize - this is the size of the requested ROI in unbinned rows
  • roiCsize - this is the size of the requested ROI in unbinned columns.

The following explains the restrictions on ROI definitions made to simplify ROI handling to prevent some of this complication.

  1. Only ONE ROI may defined for any single integration. - This results from a basic assumption made by the System that ROI readout is done for the purpose of reducing the time required to readout the focal plane, either to capture transient events or to reduce the signal level on bright objects.
  2. The data provided during ROI readout will be symmetric WRT the CCD output configuration. - This means that for a CCD with more than one output the amount of data may be more than requested and may include extra or ghost ROIs for other parts of the CCD.
  3. In a multi-detector focal plane, the ROI will be described by coordinates on a single CCD. - The data provided will include that ROI from all detectors in the Focal plane.
  4. In the case where a requested ROI extends past a CCD output boundary the ROI will be redefined to be symmetrical about the output boundary. - e.g. a single 2048 Column by 4096 Row detector is being read out from two outputs in the AB configuration (outputs in the lower left and lower right corners). A ROI definition of

    roiRow=300, roiCol=300, roiRsize=500, roiCsize=1000; will result in the ROI extending past the 1024 output boundary. The ROI will be redefined to:
    roiRow=300, roiCol=300, roiRsize=500, roiCsize=724; which will result in the user getting the requested data but also getting 448 columns from the B output that were not requested.
  5. The PAN saver software will send the DHS only the data provided by the DHE. In addition the standard position size description for the data will contain the finished position and size of the ROI. IT is the responsibility of the user interface software to inform the DHS of the requested position ans size of the ROI.
  6. I'm sure there should be more but I won't know till the code is done WATCH THIS SPACE..

 


uCode Standard Loop Register Usage Guidelines

There are sixteen 16-bit loop registers for available in the Sequencer to enable code flow control. The table below shows their current default usage. While these registers are general purpose loop registers using them for other than their reserved purpose will require the writing of a custom Detector library routine (detCalcPixels) to load the registers with correct values before taking an image.

The generic_CCD and basciCCD detector libraries use these assignments, but load the seqColBin register with one less than the requested number of pixels to be binned and sets the user Bit serBinEnbl to 1 if serial binning is active. The chileCCD detector library uses these assignments, and loads the seqColBin register with the requested number of pixels to be binned and does not use serBinEnbl user bit.

Standard Loop Register Usage
Register number FPGA Register name CCD User Register name CCD Sequencer Usage IR User Register name IR Sequencer Usage Comments
0 SeqLoopReg[0] seqRowCount #NROW seqRowCount #ROW_CNT Number of rows to readout i.e. for CCDs the number of parallel or slow shifts
1 SeqLoopReg[1] seqColCount #NCOL seqColCount #COL_CNT Number of columns to readout i.e. for CCDs the number of serial or fast shifts
2 SeqLoopReg[2] seqRowBin #NPBINS seqFSamples #FSAMPLES Number of rows to bin during CCD readout or number of Fowler samples in IR Readout
3 SeqLoopReg[3] seqColBin #NSBINS seqDigAvg #DIG_AVG Number of columns to bin during CCD readout or number of Digital Average samples in IR Readout
4 SeqLoopReg[4] seqRoiRow #ROIROW seqCoAdds #COADDS Number of rows to skip during CCD ROI readout or number of Co-Adds in IR Readout
5 SeqLoopReg[5] seqRoiCol #ROICOL seqLoopDly #LOOP_DLY Number of columns to skip during CCD ROI readout or read loop delay factor in Fowler IR Readout
6 SeqLoopReg[6] seqRoiRskip #RROWSKP seqSweeps #SWEEPS Number of rows to skip after ROI readout is Complete or number of reset cycles before integration in IR mode
7 SeqLoopReg[7] seqRoiCskip #RCOLSKP seqSyncResets #SYNC_RESETS Number of columns to skip on each row after the ROI columns are read out or number of resets to do when syncing two DHE's
8 SeqLoopReg[8] seqFocusShft #FOCUS_SHFT seqRstTime #RST_TIME number of rows to shift image between focus exposures
9 SeqLoopReg[9] seqPreScan #XPRE Not Assigned Not Assigned number of prescan pixels to read (Usually not converted or transferred to the PAN
10 SeqLoopReg[10] seqShtrDly #SHUTDLY Not Assigned Not Assigned The time in ms to delay while the shutter opens or closes if these times are different use an unassigned register for the closing time.
11 SeqLoopReg[11] OvrScanRowCnt #OSROWCNT Not Assigned Not Assigned Number of binned rows to convert after reading ROI rows and skipping unread active rows
12 SeqLoopReg[12] OvrScanColCnt #OSCOLCNT Not Assigned Not Assigned Number of binned pixels to convert after reading ROI pixels skipping unread active pixels
13 SeqLoopReg[13] Not Assigned Not Assigned Not Assigned  
14 SeqLoopReg[14] Not Assigned Not Assigned Not Assigned  
15 SeqLoopReg[15] Not Assigned Not Assigned Not Assigned  

uCode Standard User Bit Usage Guidelines

The MONSOON/Torrent systems have in the sequencer Control register four user settable bits that can be used with The conditional jump instruction to steer the ucode execution. The following are the current default usage for these bits.

Standard SeqUserBits Usage
User bit number FPGA Attribute name CCD User Attribute name CCD Sequencer Usage IR User Attribute name IR Sequencer Usage Comments
0 SeqUserBit0 seqContRun #CONT_RUN seqContRun #CONT_RUN Debug function - run process indefinitely after start exposure received
1 SeqUserBit1 serBinEnbl #SBIN_ENB Not Assigned #IDLERST_ENBL Enable serial binning in CCD readout or enable array resets during idle time for IR apps.
2 SeqUserBit2 rdRoiEnbl #RDROI_ENB digAvgEnb #DIGAVG_ENBL Tells the sequencer a ROI readout is in progress for CCDs or enable digital averaging in IR apps.
3 SeqUserBit3 Not Assigned Not Assigned Not Assigned #ROWRST_ENBL Enable Row Reset mode in IR apps.

 

Torrent Firmware

Firmware Description Documents

TRNT-AD-08-0010 Firmware Users Guide for Version 2.22 [502] Rev 2
TRNT-AD-08-0011 AFE Control Module Firmware Guide [503] Rev 0 - Needs updating !

Firmware Design Guides

Firmware Design Outline Torrent LCB Firmware Design [504] Rev -C3-
From Open-Cores. Wishbone Bus specification [505] Rev -B3-1-
Clock Generator Device Programming Clock Generation Workbook [506] Rev 4
AFE Serial device data format description Torrent Serial Device Control List [507]
Power Supply to Pixel Sychronization Power Supply Sync Analysis [508]

Firmware Sources

System Level
TRNT-EL-06-0001 TorrentFpga_Ver222 [509]

Module Level
AFE_Control_Ver221 [510]
CFG_Services_Ver220 [511]
CLK_Services_Ver221 [512]
DummyModule_Ver220 [513]
LCB_Control_Ver222 [514]
PIX_Services_Ver221 [515]
PSM_Services_Ver221 [516]

Templates
CmdDecodeFifo [517]
CommsDemuxPixBuffr_V106 [518]
I2C_InterfaceV100 [519]
I2C_Inerface_Ver210 [520]
PixDataMuxFifo_V103 [521]
SeqPatMemCore [522]
SeqProgMemCore [523]
SerialFPDP_fifo_5v5 [524]
SerialFPDPV5v5a - Contact Peter Moore (pmoore_at_noao.edu)
SerialFPDPV5V5b - Contact Peter Moore (pmoore_at_noao.edu)
SyncPortFifo_V100 [525]
Uart_8 [526]
UartFifo [527]
VideoFifo [528]
WishBoneIntercon_Ver222 [529]
WishBoneMasterInterfaceV106 [530]
WishBoneSlaveInterface_Ver207 [531]
NOAO_tblock [532]

Firmware Information - Quick Links

  • DHE Communication link bandwidths
  • LCB Clock Sources and Frequencies
  • Clock Sources for Master sync clock
  • RS232 Communication Channel Command Codes
  • Firmware Module Addressing and Identity Codes
  • Standard Data Destination Codes for Communication
  • Standard Register Addresses for Firmware Modules
  • Power Supply Status word definition
  • AFE Mezzanine Override register bit definitions
  • DheTempSensorSlct Register Value Significance
  • Sequencer State Register Bit Assignments for Firmware Modules
  • Addresses for I2C Bus Devices / FPGA Boot Code Version Selection
  • Bit significance for the LED_1_Slct and LED_2_Slct indicator attributes
  • DbgSigSlct attribute values
  • Wishbone system status signal assignments for Firmware Modules
    • Local Control Board Module Status Output Assignments
    • Power Supply Services Module Status Output Assignments
    • Configuration Services Module Status Output Assignments
    • Pixel Services Module Status Output Assignments
    • Analog Front End Control Module Status Output Assignments
    • Clock Services Module Status Output Assignments


DHE Communication link bandwidths

There are four communication channels available on the Torrent DHE. The table below shows the available bandwidth for these links and their intended use.

DHE Communication Channels
Channel Bit Rate Command Bandwith (32-bit Words) Video Data Bandwith (18-bit Words) Purpose
Systran 1.0625 GBit/sec 26.5 Meg/sec 26.5 (53 for 16-bit packed pixels) Meg/sec Primary command downlink, Primary data uplink.
Sync In/Out 39.8 Meg/sec 1.0 Meg/sec n/a Inter-DHE communications, commands, synchronization
UART 9600 240 / sec n/a Engineering and maintenance
GIGe Vision Gigabit Ethernet 412.5 K/sec 26.5 Meg/sec (16-bit words). Alternate control downlink and data uplink

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LCB Clock Sources and Frequencies

There are several clock sources available from the LCB clock synthesizer hardware (U28). These clocks provide synchronization to specific areas of the Torrent hardware and firmware. The table below lists the clock name, the nominal frequency and their intended application.

Available LCB clock sources
Clock Name Frequency (Mhz) Purpose
OCLK (internal) 106.25 LCB Oscillator used during LCB Initialization and in Master mode.
sync_in_clk (internal) 39.84375 Master clock input when in Slave mode. OCLK is shut down
BCLK (internal) 106.25 (Master) / 39.84375 (Slave) Clock source for the clock synthesizer. OCLK or sync_in_clk
SysClk (internal) 106.25 General logic, Wishbone bus clock
LCLK 106.25 Low jitter clock source for the GTP Transceiver (SFPDP comms)
PCLK 159.375 Memory.
DCLK 79.6875 AFE interface bridge logic.
TCLK 39.84375 AFE ADC data clock
MCLK 39.84375 Sync port communications and synchronization logic

These clocks are derived from U28 (LMK03000) using the following register constants

LMK03000 Programming Scheme for Master DHE (BCLK = 106.25 MHz)
Clock Name Phase detect Freq. (Mhz) VCO Freq. (Mhz) Divide by 'R' Value VCO Divider Value Divide by 'N' Value Clock Divider Value
SysClk 13.28125 1275 8 2 48 6
LCLK 13.28125 1275 8 2 48 6
PCLK 13.28125 1275 8 2 48 4
DCLK 13.28125 1275 8 2 48 8
TCLK 13.28125 1275 8 2 48 16
MCLK 13.28125 1275 8 2 48 16

For DHE Slave operation, where the BCLK frequency is 39.84375 MHz, the value of the Divide by 'R' value changes to 3. All other constants remain the same.

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Clock Sources for Master sync clock

There are two clock sources available to provide the master OUTSYNC_CLK. The FPGA internally generated source and a source generated directly from the clock synthesizer hardware (U28). These clocks provide synchronization to the slave DHE systems. The table below lists the combinations available by writing to the SyncClkSelect attribute.

SYNC clock sources and routing
Attribute value OUTSYNC_CLK Source FPGA SYNC CLK source Attribute value OUTSYNC_CLK Source FPGA SYNC CLK source
0x0 U28 U28 0x8 Invalid state Invalid state
0x1 FPGA U28 0x9 Invalid state Invalid state
0x2 U28 FPGA 0xA U28 Disabled
0x3 FPGA FPGA 0xB FPGA Disabled
0x4 Disabled U28 0xC Disabled Disabled
0x5 Invalid state Invalid state 0xD Invalid state Invalid state
0x6 Disabled FPGA 0xE Invalid state Invalid state
0x7 Invalid state Invalid state 0xF Invalid state Invalid state

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RS232 Communication Channel Command Codes

The LCB supports an engineering RS232 communication port for engineering use. The available commands (shown below) are prefixed with the 'plus' (+) character (0x2B) and completed with a 'Line Feed' character (0x0A). The standard format of 9600 Baud, 8 bits, no parity is supported. Upper or lower case characters are recognized. All address and data values must be expressed in hex. Fields must be separated by a space or tab character. Backspace clears the current command (although currently the display looks messy).

Torrent engineering commands for RS232 link
First Field Second Field Third Field Forth Field Command description
+A 16-bit vector (valid range 0x0 through 0xFFFF) Not Used Not used Forces an Asynchronous Command to synchronize the communication channels after reset
+R Module number (valid range 0x01 through 0xFF) Module Address (valid range 0x0 through 0xFFFF) Not used Returns the 32-bit contents of the addressed register (in hex)
+W Module number (valid range 0x01 through 0xFF) Module address (valid range 0x0 through 0xFFFF) 32-bit data value (valid range 0x0 through 0xFFFFFFFF) Writes the 32-bit value to the addressed register
+S 8-bit data value (valid range 0x0 through 0xFF) as sequencer start vector Not used Not used Triggers a 'Start Exposure' event in the sequencer with the 8-bit start vector

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Firmware Module Addressing and Identity Codes

As per ICD 6.1 we use a board select code in each command sent to the LCB to address the individual modules that make up the firmware suit loaded to the Virtex part. This note pretends to fix the identity of the modules selected by each bit of the board select bit field used in the command structure. There are 10 bits available in this field. Torrent currently supports the use of the lowest order five bits although eight bits can be specified (with minor modification) in the Torrent architecture. The table below identifies the correspondence:

Torrent firmware module addressing
Board Select Bit Module Selected Module Abbreviation Module Identity Code Module purpose
0 (0x01) LCB Control Module LCB 201 Communications and digital control of the Torrent DHE
1 (0x02) Power Supply Services PSM 202 Safety, Control, and telemetry of the power supply board (PSM)
2 (0x04) Configuration Services CFG 203 Configuration data management (eeprom data), LCB clock control and sequencer (CFG)
3 (0x08) Pixel Data Services PIX 204 Pixel data memory and descrambling logic common to OUV and IR (PIX)
4 (0x10) Analog Front End Control (AFE) AFE 205 Analog front end electronics control and pixel acquisition (IR or OUV).
5 (0x20) Spare select bit SPR1 Not assigned Spare module select bit.
6 (0x40) Spare select bit SPR2 Not assigned Spare module select bit.
7 (0x80) Clock Services CLK 208 Clock control module.

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Standard Data Destination Codes for Communication

The LCB_Control module supplies four duplex channels of communications with the DHE. These four comms channels are: Serial FPTP (Systran Emulation), GIGe (Gigabit ethernet), UART (via serial at 9600 Baud, no handshake), and the SYNC port that links to other slave/master DHE's. The comms destination bits set the required destination for these devices. Setting more than one bit results (mostly !) in parallel transmission to all devices.

Comm Device bit assignments
Bit Number Comm Device
0 ("0001") Serial FPDP
1 ("0010") SYNC Port
2 ("0100") UART Port
3 ("1000") GIGe Port

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Standard Register Addresses for Firmware Modules

Each firmware module must supply several registers to support the automatic recognition and configuration processes of the PAN computer. These module addresses are shown below with their functional description:

Standard Torrent Module Registers
Address Register Name Write / Read Register purpose
0xFFFF CodeId 32-bit read only Version number of the firmware module code as an integer. Divide by 100 for major / minor version.
0xFFFF RebootCmd 32-bit Write only (data discarded) Write to this register to warm reboot the LCB. All module select bits must be high i.e. 0xFF.
0xFFFE ModuleId 32-bit read only Module identification number of the firmware module - see section on Firmware Module Addressing and Identity Codes
0xFFFE ResetCmd 32-bit Write only (data discarded) Write to this register to reset the module. Multiple module select bits may be specified in the same command. Writing to this location with the all board select bits set high effects a general LCB system reset to all modules and the wishbone bus infrastructure.
0xFFFD Status 32-bit Read only Read of module status word - Data is module specific.

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Power Supply Status word definition

The power supply monitors the state of the hardware protection circuits on the LCB-MEZ board. These status bits, when true, indicate a hardware protection fault condition that has interrupted the power supply to one or both of the AFE boards. This status regester is (usually) read as an attribute from the DHE at address 0x016F. The attribute name is PwrSupplyStatus.The status bits and their function definitions are shown below :

Power Supply Status Register
Bit Purpose Bit Purpose
7 AFE-1 VANA Power Protection Active 3 AFE-1 / AFE-2 VHV Power Protection Active
6 AFE-1 VCB Power Protection Active 2 Vbb supply active
5 AFE-2 VANA Power Protection Active 1 AFE Power Up Sequence Complete / AFE Power is _ON_
4 AFE-2 VCB Power Protection Active 0 Power Supply Power Up Sequence Complete / Power is Available

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AFE Mezzanine Override register bit definitions

The mezzanine override register allows you to independently control the AFE power enable bits for the mezzanine board. This is _ONLY_ used for testing purposes since indiscriminate enabling power supplies can cause you to exceed the power supply load capabilities. This register is read and write at address 0x202 in the PSM module

Mezzanine Override Register
Bit Purpose Bit Purpose
7 Not used 3 Not used
6 AFE 2 +/- VHV supply enable 2 AFE 1 +/- VHV supply enable
5 AFE 2 +/- VCB supply enable 1 AFE 1 +/- VCB supply enable
4 AFE 2 +/- VANA supply enable 0 AFE 1 +/- VANA supply enable

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DheTempSensorSlct Register Value Significance

This register select which temperature sensor in the DHE is to be used for feedback in the DHE temperature servo loop. The selection of the sensor is based upon a 1 Of 8 (3-bit) code set into the DheTempSensorSlct attribute. The codes are :

DheTempSensorSlct Register Significance
Code Selected Temp Sensor
0 ("000") FPGA temperature sensor (default)
1 ("001") LCB_temperature0
2 ("010") LCB_temperature1
3 ("011") AFE1_temperature0
4 ("100") AFE1_temperature1
5 ("101") AFE2_temperature0
6 ("110") AFE2_temperature1
7 ("111") Load feedback from PAN attribute write (for testing purposes)

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Sequencer State Register Bit Assignments for Firmware Modules

Each firmware module that requires to know the sequencer state information provides a 32-bit register at address 0xFFF0. The sequencer uses this register to periodically write the sequencer state information to all modules that use this address. The lower 16-bits of the register are static values and may be used to indicate the current mode of the sequencer function (e.g. ROI Readout Mode, Digital Averaging Enabled, etc.). The top 16-bits (31:16) are strobe signals that indicate an event during the sequencer operation (Frame Start, Line Start, etc.) and these bits persist for, and are synchronous to one SysClk cycle before being cancelled. The table below indicates the significance of the Sequencer State Register.

Sequencer State Register Assignments
Bit Signal Type Used By Bit Signal Type Used By
31 FrameStartSync Strobe AFE 15 Spare Static n/a
30 LineStartSync Strobe AFE 14 Spare Static n/a
29 Spare Strobe n/a 13 Spare Static n/a
28 Spare Strobe n/a 12 Spare Static n/a
27 Spare Strobe n/a 11 Spare Static n/a
26 Spare Strobe n/a 10 Spare Static n/a
25 Spare Strobe n/a 9 Spare Static n/a
24 Spare Strobe n/a 8 Spare Static n/a
23 Spare Strobe n/a 7 Spare Static n/a
22 Spare Strobe n/a 6 Spare Static n/a
21 Spare Strobe n/a 5 Spare Static n/a
20 Spare Strobe n/a 4 Spare Static n/a
19 Spare Strobe n/a 3 Spare Static n/a
18 Spare Strobe n/a 2 Spare Static n/a
17 Spare Strobe n/a 1 Spare Static n/a
16 Spare Strobe n/a 0 Spare Static n/a

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Addresses for I2C Bus Devices / FPGA Boot Code Version Selection

There are five I2C buses associated with the Torrent DHE; one I2C bus for every physical board (LCB, PSM, TSM, AFE1, AFE2). There are four devices attached to each bus. This table lists their addresses and describes their use. During the DHE initialization (just after boot), the SDA signal line of each I2C bus is used to detect the presence of the physical board. The SCL signal for AFE1 (AFE_SCL_SRC0) is also used to direct the revision of the code that is booted at power up. This signal is pulled 'high' through a 50K Ohm pullup to 3.3v on the LCB. IR AFE boards should pull this signal low via a 3.3K Ohm resistor to the VPIFC GND return. This will select revision zero of the XF32P eeprom (LCB U43) boot code to load to the FPGA for IR operation. CCD AFE boards should leave this signal floating to select revision 1 of the boot code for VIS operation.

I2C Bus Module Addresses
Address Device Type Description
0x48 MCP9803 Temperature sensor used to control the DHE operating temperature and supply telemetry
0x49 MCP9803 Temperature sensor used to control the DHE operating temperature and supply telemetry
0x50 DS28CM00 48-bit silicon serial number as unique identity for each hardware board. Only the ls 32-bits are read.
0x54 24AA128 Calibration coefficient store space. Page written and read; 256 Pages each with 16 x 32-bit words.

For PAN control of these resources there are several registers that are used to read and write to the I2C devices. These are listed in the following table:

Control of I2C EEProm, Temperature sensors, and Silicon Serial Numbers
Attribute name Address Write Value Read Value Description
DetectI2CBus 0x0012 Anything Bit(4)=AFE2 Detected,
Bit(3)=AFE1 Detected,
Bit(2)=TSM Detected,
Bit(1)=PSM Detected,
Bits(0)=always '1'
5-bit read/write register. Write anything to initiate I2C bus detection, Read to see hardware devices available
ReadI2CBusTemps 0x0013 Bits(20:16)=I2C Channel Addr, Bit(0)=Temperature sensor 1 or 2. Not Accessible 32-bit write register. Write to initiate I2C temperature sensor read cycle and update read only registers.
ReadI2CBusSerial
Numbers
0x0014 Bits(20:16)=I2C Channel Addr. Not Accessible 32-bit write register. Write to initiate I2C silicon serial number reads and update read only registers
eepRdCmdReg 0x0020 Bits(20:16)=I2C Channel Addr. Bits(7:0)=EEProm page address. Bit(31)=I2C manager busy,
Bit(30)= Error occurred during read - bad I2C acknowledge.
32-bit read/write register. Command register to select and read an eeprom page
eepWrtCmdReg 0x0021 Bits(20:16)=I2C Channel Addr. Bits(7:0)=EEProm page address. Bit(31)=I2C manager busy,
Bit(30)= Error occurred during write - bad I2C acknowledge.
32-bit read/write register. Command register to select and write an eeprom page

Channel Address values for the physical hardware boards are: LCB = 1, PSM = 2, TSM = 4, AFE1 = 8, AFE2 = 16.

For the ReadI2CBusTemps, ReadI2CBusSerialNumbers, and eepWrtCmdReg commands, multiple channel addresses are allowed (i.e. you can read multiple temperature sensors or write the same data to multiple EEproms using just one command transaction).

For the eepRdCmdReg command, only one unique channel address is allowed.

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Bit significance for the LED_1_Slct and LED_2_Slct indicator attributes

There are two 8-bit registers assigned to provide visual indication of the internal signals of the FPGA. These registers are read / write. By setting a bit true the indicator (LED1 or LED2) will flash briefly (25ms) every time the selected signal becomes active true. LED1 is currently mounted on the Sync In port connector and LED2 is mounted on the Sync Out Port connector. The tables below indicate the significance of each attribute bit.

LED1 Signal Select Bits
bit signal
7 BusReset
6 SlaveErrOut(4)
5 SlaveErrOut(3)
4 SlaveErrOut(2)
3 SlaveErrOut(1)
2 SlaveErrOut(0)
1 CfgCycleRequest
0 LcbCycRequest
LED2 Signal Select Bits
bit signal
7 SRC_SYNC_OUT
6 SNK_SYNC_IN
5 V33_SYNC_OUT
4 V300_POLARITY
3 V180_PWR_EN_N
2 V80_PWR_EN_N
1 VFAN_PWR_EN_N
0 MCLK_SEL_N

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DbgSigSlct attribute values

This attribute controls the selection of a group of eight signals that are presented on the CFGDATA(7:0) signals (connector J4) on the LCB. By setting the attribute to different values, the hardware debug signals are available for diagnostic use. The attribute accepts values from zero to ten. The list below shows the significance.

DbgSigSlct Attribute values
Value Signal Group
0 Signals off
1 LCB Control Signal group
2 PSM Services Signal group
3 CFG Services Signal group
4 PIX Services Signal group
5 AFE Control Signal group
6 Signals off - Future AFE2 Signal group
7 Signals off - Spare
8 CLK Services Signal group
9 System Bus Signal group
10 Auxiliary Signal group

These tables list the individual signals for each group.

DbgSigSlct = 1 - LCB Control signal assignments
bit signal
7 GIGe_PIXEL_CLK
6 GIGe_FVAL
5 GIGe_LVAL
4 GIGe_DVAL
3 PixDataRdy
2 GIGe_BULK0_CLK
1 GIGe_BULK0_RXD
0 LinkUp
DbgSigSlct = 2 - PSM Services signal assignments
bit signal
7 AfePwrIsOn
6 TEMP_2_SNS
5 TEMP_1_SNS
4 LOGIC_SYNC
3 V300_SYNC
2 V180_SYNC
1 V80_SYNC
0 V33_SYNC
DbgSigSlct = 3 - CFG Services signal assignments
bit signal
7 MstrScl
6 MstrSdain
5 MstrSdaOut(2)
4 MstrWrtEn
3 SYNC_DHE
2 SE_OUT
1 SE_READY
0 SYNC_POWER
DbgSigSlct = 4 - PIX Services signal assignments
bit signal
7 MemInitDone
6 DlyClkLocked
5 app_af_wren
4 app_af_cmd(0)
3 app_af_cmd(1)
2 rd_data_valid
1 app_wdf_wre
0 MemoryDataClk
DbgSigSlct = 5 - AFE Control signal assignments
bit signal
7 DacDevData(17)
6 DacDevData(16)
5 AFE_CLKBIAS(77)
4 AFE_CLKBIAS(48)
3 SerialSync(0)
2 SerialData(0)
1 SerialClk(0)
0 DacCtrlDataRdy
DbgSigSlct = 8 - CLK Services signal assignments
bit signal
7 DCLK_FEED
6 BCLK_FEED
5 CLK_CTRL_CS_N
4 CLK_CTRL_GOE
3 CLK_CTRL_LOCK
2 CLK_CTRL_SYNC
1 CLK_CTRL_DATA
0 CLK_CTRL_CLK
DbgSigSlct = 9 - System signal assignments
bit signal
7 Mstr1Grnt
6 Mstr0Grnt
5 SlaveCycle
4 SlaveWrite
3 SlaveError
2 StatusEnable
1 SlaveAck1
0 SlaveAck0

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Wishbone system status signal assignments for Firmware Modules

Each firmware module can supply eight bits of 'out of band' status information which is used to transport slow signals (such as static configuration values) to other modules. The routing is controlled by the System Intercon module which employs static assignment to route input status bits to the global 32-bit output status sent to the other modules slave interface. The table below shows the routing information for the system at FPGA version level 2.22.

Global Status Assignments
Bit Signal Origin Used By Bit Signal Origin Used By
31 ShutDownQuick PSM AFE 15 n/a n/a Spare
30 AsyncFlag LCB CFG 14 n/a n/a Spare
29 ReadoutInProgress CFG AFE 13 n/a n/a Spare
28 FrameStart CFG AFE 12 n/a n/a Spare
27 LineStart CFG AFE 11 n/a n/a Spare
26 MemPwrEnbld PSM PIX 10 n/a n/a Spare
25 ClocksAreLocked CLK PIX 9 n/a n/a Spare
24 AFEPowerOn PSM AFE 8 StreamMode PIX AFE
23 VHVPolarity PSM AFE 7 DheIsSlave CFG LCB, CLK
22 AFE 2 is enabled AFE PSM 6 Pixels16 PIX LCB
21 AFE 1 is enabled AFE PSM 5 PackedPixels PIX LCB
20 n/a n/a Spare 4 AFE2_Detected CFG PSM, AFE
19 n/a n/a Spare 3 AFE1_Detected CFG PSM, AFE
18 n/a n/a Spare 2 TempChanSlct(2) PSM CFG
17 n/a n/a Spare 1 TempChanSlct(1) PSM CFG
16 n/a n/a Spare 0 TempChanSlct(0) PSM CFG

These next tables show the module status output assignments:

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Local Control Board Module Status Output Assignments

Local Control Board Module (LCB) System Status Output Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 n/a Spare
6 n/a Spare 2 n/a Spare
5 n/a Spare 1 n/a Spare
4 n/a Spare 0 AsyncFlag True after reboot while waiting for a comm port async command
Local Status significance
Bit Signal Description Bit Signal Description
0 AsyncFlag_i Awaiting communication sync command from PAN 7:1 n/a Spares
8 CommDeviceBusy_i The science data comms channel is blocked up 9 SfpdpLossOfSig_i Systran link down. No carrier present signal
10 SfpdpTxFault_i There is a hardware fault in the Systran optical transmitter part 11:12 n/a Spares
28:13 WbErrorStats_i(15:0) Wishbone bus error statistics      

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Power Supply Services Module Status Output Assignments

Power Supply Services Module (PSM) System Status Output (0xFFFD) Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 ShutDownQuick Emergency shutdown signal
6 VHVPolarity True indicates N-Channel mode (positive VHV) 2 TempChanSlct(2) 1 of 8 slct of DHE temperature control sensor
5 AFEPowerOn The AFE boards have VANA+/- powered up 1 TempChanSlct(1) 1 of 8 slct of DHE temperature control sensor
4 MemPwrEnbld 1.8v Memory power is available. 0 TempChanSlct(0) 1 of 8 slct of DHE temperature control sensor
PSM Local Status register (0xFFFC) significance
Bit Signal Description Bit Signal Description
0 VFanTempSensorSlct_reg(0) Same signal as system status 1 VFanTempSensorSlct_reg(1) Same signal as system status
2 VFanTempSensorSlct_reg(2) Same signal as system status 3 ShutDownQuick Panic !!
4 TsmPresent_i Indicates that the TSM is present. 5 n/a Spare
6 n/a Spare 7 n/a Spare
PSM Power Status Register (0x020F) significance
Bit Signal Description Bit Signal Description
0 PrimaryPwrStat Primary power is available 1 AfePwrStat AFE power is available
2 VbbEnableFlag Vbb supply is enabled (after safety conditioning) 3 AfeV300Fail Mezzanine Fail indicator for VHV
4 Afe2V180Fail Mezzanine Fail indicator for VCB on AFE2 5 Afe2V80Fail Mezzanine Fail indicator for VANA on AFE2
6 Afe1V180Fail Mezzanine Fail indicator for VCB on AFE1 7 Afe1V80Fail Mezzanine Fail indicator for VANA on AFE1
PSM Mezzanine Override Register (0x0202) significance
Bit Signal Description Bit Signal Description
7:0 MezOverRide_reg As written by PAN 8 Afe1V80Fail Mezzanine Fail indicator for VANA on AFE1
9 Afe1V180Fail Mezzanine Fail indicator for VCB on AFE1 10 AfeV300Fail Mezzanine Fail indicator for VHV
11 n/a Not used 12 Afe2V80Fail Mezzanine Fail indicator for VANA on AFE2
13 Afe2V180Fail Mezzanine Fail indicator for VCB on AFE2 14 AfeV300Fail Repeat of Mezzanine Fail indicator for VHV

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Configuration Services Module Status Output Assignments

Configuration Services Module (CFG) System Status Output Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 DheIsSlave The DHE is configured as a slave device in a multi-DHE system
6 n/a Spare 2 AFE2_Detected The AFE2 board is physically present
5 LineStart Indicates a new row beginning 1 AFE1_Detected The AFE1 board is physically present
4 FrameStart Indicates a new frame beginning 0 ReadoutInProgress Sequencer is actively reading detector
Local Status significance
Bit Signal Description Bit Signal Description
0 ReadoutActive Sequencer EFR bit to indicate that ... 1 AFE0_ModuleDetect AFE1 has been detected during the I2C bus search
2 AFE1_ModuleDetect AFE2 has been detected during the I2C bus search 3 DheIsSlave DHE is operating as a slave DHE
4 FrameStart A frame start flag has been issued in the pixel stream 5 LineStart A line start flag has been issued in the pixel stream
15:6 not used Spare 19:16 BusTimeoutReg Sequencer Wishbone master Bus Timeout Register
23:20 BusGrantReg Sequencer Wishbone master Bus Grant error register 27:24 BusErrorReg Sequencer Wishbone master Bus slave Error register
31:28 BusEventStatusReg Sequencer Wishbone master Bus status register      

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Pixel Services Module Status Output Assignments

Pixel Services Module (PIX) System Status Output Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 n/a Spare
6 n/a Spare 2 StreamMode Pixel data path configured for Stream Data acquisition mode i.e. no memory buffering
5 n/a Spare 1 Pixels16 Pixel data has been scaled to 16-bits by the PIX module.
4 n/a Spare 0 PackedPixels Each 32-bit pixel data word contains 2 x 16-bit pixels.
Local Status significance
Bit Signal Description Bit Signal Description
0 MemCntrInitDone_i Memory system calibrated and ready for use 31:1 n/a Spares

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Analog Front End Control Module Status Output Assignments

System Status Output Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 n/a Spare
6 n/a Spare 2 n/a Spare
5 n/a Spare 1 afe_enbl_reg(1) True when AFE 2 is enabled via AfeInterfaceEnbl
4 n/a Spare 0 afe_enbl_reg(0) True when AFE 1 is enabled via AfeInterfaceEnbl
Local Status significance
Bit Signal Description Bit Signal Description
0 RfshTpActFlag Test points are being refreshed 1 RfshActiveFlag DAC and Test Points are being refreshed
4 tp_fifo_empty The Test point write FIFO is empty 5 dac_fifo_empty The DAC write FIFO is empty
8 TelScanGo Telemetry scan is active 9 RfshTpWrtFifo transfer test point index to tp write fifo

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Clock Services Module Status Output Assignments

Clock Services Module (CLK) System Status Output Assignments
Bit Signal Description Bit Signal Description
7 n/a Spare 3 n/a Spare
6 n/a Spare 2 n/a Spare
5 n/a Spare 1 n/a Spare
4 n/a Spare 0 ClocksAreLocked Clock Synthesizer has lock and clocks are good
Local Status significance
Bit Signal Description Bit Signal Description
0 LockDetect_i The clock generator is running locked to the reference frequency 31:1 n/a Spares

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Loading Firmware code to the LCB eeprom

Loading the PROM Code

1) Point the Impact tool to the systemBuildFilename.ipf tool by right clicking the "Configure Target Device"/"Properties" menu item.

2) Load Impact and confirm that the boundary scan devices have the correct file associations, systemBuildFilename.mcs and systemBuildFilename.bit.

3) Right click the xcf32p device and select "Programming Properties". Make sure the following boxes are checked:

  • Verify
  • Erase Entire Device
  • Parallel Mode
  • During Configuration: PROM is Slave

All other check boxes should be clear

4) Right click on the xcf32p device, select "Load Configuration Revision", and set to 0.

5) Right click on the xcf32p device, select "Set Erase Properties", and set to Erase Entire Device.

6) Right click on the xcf32p device and select "Program" to program the device. This operation will take a few minutes.

Creating the PROM Programming MCS File

This is the procedure to create the PROM MCS file from the FPGA BIT file.

1) In the "Processes" window of the Xilinx ISE project navagator, click on "Configure Target Device" and then double click "Generate Target PROM/ACE File. This will start the Impact tool and display a Welcome page.

2) Select "Prepare a PROM File" and clock Next.

3) A new page is displayed to prepare the PROM files. Set the following:

  • Target - click "Xilinx PROM" radio button
  • PROM File Format - click "MCS" radio button
  • Checksum Fill Value - set to FF
  • PROM File Name - type in the filename, typically systemBuildName_VerXXX.
  • Location - browse to the directory where the BIT file is located, usually the SystemBuild directory.

Click next.

4) Select the PROM mode page - set the following:

  • I am using a Xilinx PROM in a Parallel Mode.
  • The data bus width for my FPGA is The same as the data width for my PROM device.

Click next.

5) Specify Xilinx PROM Device page - set the following:

  • Set the Enable Revisioning check box.
  • Set the Number of Revisions to 2.
  • Select a PROM in the pulldown menus "xcfp" and "xcf32p [32M]", and click Add. Position 0 and Part Name xcf32p should appear in the field.

Click next.

6) A file generation summary is displayed - click finish.

7) The PROM file formatter is launched and a pop-up to start adding device file to Revision:0 is displayed. Click OK.

8) The files in the project location directory are displayed. Select the appropriate BIT file and click OPEN.

9) Another pop-up appears Would you like to add another design file to Revision 0:? Click NO

10) Another pop-up appears Start adding device file to Revision:1. Click OK.

11) The files in the project location directory are displayed again. Select the same BIT file as in step 8 and click OPEN.

12) Another pop-up appears Would you like to add another design file to Revision 1:? Click NO.

13) Another pop-up appears You have completed the device file entry - click OK.

14) In the "Configuration Operations" tab of the ISE Navigator double-click on the Generate File operation. This will complete the process and a window should pop-up indicating that it succeeded.

Torrent Mechanical

Mechanical Parts
TRNT-EL-02-1001 CARD GUIDE MOUNT [533]
TRNT-EL-02-1002 CONTROLLER BOTTOM PLATE [534]
TRNT-EL-02-1003B CONTROLLER REAR PANEL [535]
TRNT-EL-02-1004A CONTROLLER FRONT PANEL [536]
TRNT-EL-02-1005 CONTROLLER CROSS RAIL RIGHT [537]
TRNT-EL-02-1006 CONTROLLER CROSS RAIL LEFT [538]
TRNT-EL-02-1007B CONTROLLER REAR PANEL INSERT [539]
TRNT-EL-02-1008B CONTROLLER COVER [540]
TRNT-EL-02-1010B PSM ENCLOSURE BASE [541]
TRNT-EL-02-1011 PSM ENCLOSURE BOTTOM COVER [542]
TRNT-EL-02-1012A PSM ENCLOSURE FILL PLATE [543]
TRNT-EL-02-1013 CONTROLLER SUPPORT RAIL SPACER [544]
TRNT-EL-02-1016 CONTROLLER PCB SUPPORT RAIL REAR [545]CON
TRNT-EL-02-1017 CONTROLLER PCB SUPPORT RAIL FRONT [546]
TRNT-EL-02-1019A CONTROLLER EMI PLATE [547]
TRNT-EL-02-1020 DHE MOUNTING TAB [548]
TRNT-EL-02-1021B TRANSITION MODULE BASE PLATE [549]
TRNT-EL-02-1022B TRANSITION MODULE ISOLATION CONNECTOR PLATE [550]
TRNT-EL-02-1023C TRANSITION MODULE ISOLATION RAIL [551]
TRNT-EL-02-1024A TRANSITION MODULE BASE HEADER [552]
TRNT-EL-02-1025B TRANSITION MODULE SIDE PLATE, LEFT [553]
TRNT-EL-02-1026B TRANSITION MODULE SIDE PLATE, RIGHT [554]
TRNT-EL-02-1027A TRANSITION MODULE UTILITY BOARD HEADER [555]
TRNT-EL-02-1028B TRANSITION MODULE BASE TOP COVER PLATE TAB [556]
TRNT-EL-02-1029A TRANSITION MODULE BASE FRONT COVER [557]
TRNT-EL-02-1030A TRANSITION MODULE BASE TOP COVER [558]
TRNT-EL-02-1031 ETHERNET BOARD STANDOFF [559]
TRNT-EL-02-1032 ETHERNET BOARD COVER [560]
TRNT-EL-02-1034B Hex Jam Nut .688-24 [561]
TRNT-EL-02-1035B Hex Jam Nut 1.063-18 [562]
TRNT-EL-02-1036A Hex Jam Nut 1.188-18 [563]
TRNT-EL-02-1037A FINNED BLWR HSG [564]
TRNT-EL-02-1038 HSG CVR [565]

Torrent Construction

These documents outline assembly procedures for constructing the Torrent DHE. They are specifically applicable to techniques used at NOIRLabs but presented here as a help to understanding the assembly process associated with the various mechanical and electrical modules.

Parts Kit Documents
TRNT-EL-02-0000 Blank Dewar Interface kit [566] Rev -0D-
TRNT-EL-02-0014 Transition Module Base Kit [567] Rev -0D-
TRNT-EL-02-0015 KPNO Dewar Connector Plate Kit [568] Rev -0D-
TRNT-EL-02-0016 CCD Flex Cable Kit [569] Rev -0D-
TRNT-EL-02-0017 LCB Kit [570] Rev -0D-
TRNT-EL-02-0018 Controller Base Kit [571] Rev -0D-
TRNT-EL-02-0020 External Connector Kit [572] Rev -0D-
TRNT-EL-02-0021 TSM Covers Kit [573] Rev -0D-
TRNT-EL-02-0022 Controller Cover Kit [574] Rev -0D-

Assembly Documents
TRNT-EL-02-0001A DETECTOR HEAD ELECTRONICS [575]
TRNT-EL-02-0002B CONTROLLER ASSEMBLY [576]
TRNT-EL-02-0003C TRANSITION MODULE ASSEMBLY [577]
TRNT-EL-02-0004B POWER SUPPLY MODULE [578]
TRNT-EL-02-0005A CCD PREAMP TRANSITION BOARD [579]
TRNT-EL-02-0006B TRANSITION MODULE CHASSIS [580]
TRNT-EL-02-0007B BLOWER HOUSING [581]
TRNT-EL-02-0008A CONTROLLER MODULE CHASSIS [582]
TRNT-EL-02-0009 CONTROLLER MODULE PCB MOUNT REAR [583]
TRNT-EL-02-0010 CONTROLLER MODULE PCB MOUNT FRONT [584]
TRNT-EL-02-0011A ETHERNET BOARD ASSEMBLY [585]
TRNT-EL-02-0012B LCB ASSEMBLY [586]
TRNT-EL-02-0024 Torrent Assembly Steps - Controller Module [587] Rev -A-
TRNT-EL-02-0025 TRAN ISOL PLT [588]
TRNT-EL-02-0026 AFE EXT BRD ASSY [589]
 

Torrent Test and Calibration Procedures

TRNT-TS-01-0002 Board Test Requirements [590] Rev 2

Torrent Engineering Change Orders (ECO)

ECOFORM TEMPLATE [591]
Master ECO List [592]
TRNT-001 [593]
TRNT-002 [594]
TRNT-003 [595]
TRNT-004 [596]
TRNT-005 [597]
TRNT-006 [598]
TRNT-007 [599]
TRNT-008 [600]
TRNT-009 [601]
TRNT-010 [602]
TRNT-011 [603]
TRNT-012 [604]
TRNT-013 [605]
TRNT-014 [606]
TRNT-015 [607]
TRNT-016 [608]
TRNT-017 [609]
TRNT-018 [610]
TRNT-019 [611]
TRNT-020 [612]
TRNT-021 [613]
TRNT-022 [614]
TRNT-024 [615]
TRNT-025 [616]
TRNT-026 [617]
TRNT-027 [618]
TRNT-028 [619]
TRNT-029 [620]
TRNT-030 [621]
TRNT-031 [622]
TRNT-033 [623]
TRNT-034 [624]
TRNT-035 [625]
TRNT-036 [626]
TRNT-037 [627]
TRNT-038 [628]
TRNT-039 [629]
TRNT-040 [630]
TRNT-041 [631]

 

Torrent System Configuration Data

These system configuration data packages can be used as templates for future instrument configuration sets. They are offered 'as is' without any warranty as to their operational state or suitability of purpose to other implementations.

Configuration _basicCCD [632] - Test configuration for the Borg tool
Configuration _bill [633] - Laboratory system which always works
Configuration _chile1 [634] - Used to characterize and test the prototype Torrent DHE against the requirements document
Configuration _chiron [635] - Operational configuration running an E2V 4k x 4k detector on the Chiron spectrograph


Source URL (modified on 08/12/2020 - 16:13): http://www.ctio.noao.edu/noao/content/Technical-Documents

Links
[1] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Licensing/Monsoon_License_Rev_1.0.pdf
[2] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/MNSN-AD-10-0001_Document_Structure.pdf
[3] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/TRNT-AD-10-0001_Document_Structure.pdf
[4] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0004_ICD_6.0_Generic_DHE_Interface_Description_Rev_1.0.pdf
[5] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0005_ICD_6.1_DHE_Interface_Description_Rev_1.1.pdf
[6] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0002_ICD_4.0_Generic_Pixel_Service_Communications_Command_Response_and_Data_Stream_Interface_Description_Rev_1.1.pdf
[7] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0003_ICD_5.0_PAN_Communications_Command_Response_and_Data_Stream_Interface_Description_Rev_1.0.pdf
[8] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0007_ICD_5.1_PAN_Run-time_Configuration_Setup_and_Operating_Mode_Definition_Interface_Description_Rev_1.0.pdf
[9] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0001_ICD_1.0_Data_Handling_System_Rev_1.0.pdf
[10] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Interface_Control_Documents/MNSN-AD-01-0012_ICD_1.1_Data_Handling_System_Interface_Status_and_Data_Stream_Description_Rev_1.0.pdf
[11] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/DESDOC_6563-v1_FEE_Fault_Reporting.pptx
[12] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/panview.docx
[13] http://home.fnal.gov/~tshaw/DECam_Front_End_Electronics.htm
[14] http://system1.ctio.noao.edu:8080/ECL/decam/E/index
[15] http://system1.ctio.noao.edu:8080/TV/app
[16] http://system1.ctio.noao.edu:8080/AV/app
[17] http://system1.ctio.noao.edu:8080/
[18] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_355-v22_12Ch_Acquisition_Board_Firmware_how_to_program.txt
[19] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_355-v22_12Ch_Acquisition_Board_Firmware_Version_History.txt
[20] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_2299-v11_Clock_and_Bias_Board_Firmware_Version_History.txt
[21] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_355-v22_2010_11_18_acq12_fw_408.zip
[22] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_2299-v11_CBv4.01.zip
[23] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_2878-v1_mcbFull_V1.02.zip
[24] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_4080-v7_MCB_HW1.2FW5.21.zip
[25] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_355-v22_ccdacq.mcs
[26] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_2299-v11_CBv4.01.mcs
[27] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_2878-v1_mcb_v1.02.mcs
[28] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_4080-v7_MCB_v521.mcs
[29] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Firmware/DESDOC_4080-v7_MCB_v521.bit
[30] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_5767_v2_Installing_or_Removing_Connections_to_Front_End_Crates_V2.pdf
[31] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_4654-v2_DHE_Disassembly_Directions_For_Type_1_DAQ_Crate.pdf
[32] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_4654-v2_DHE_Disassembly_Directions_For_Type_2_DAQ_%26_Heater_Crate.pdf
[33] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_6281-v1_Procedure_for_main_module_removal_or_installation.docx
[34] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_6281-v1_Procedure_for_transition_module_removal_or_installation.docx
[35] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_1781-v1_DECam_Circuit_Board_Repair_Form%20_Master.dot
[36] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Vacuum_Interface_Board/DESDOC_768-v37_TDR_Vacuum_Interface_Board_4.0.doc
[37] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_5998-v1_CCD_colors.jpg
[38] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_5998-v1_CCD_Names.txt
[39] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_5998-v1_CCD_to_Focalplane_Mapping_Aug_19_2011.pdf
[40] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/DESDOC_5998-v1_CCD_packages_in_Imager_Aug_19_2011.xlsx
[41] http://www.gerber-viewer.com
[42] http://www.mccad.com/FREE_GerberViewer.html
[43] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_354-v14_12Ch_Acqusisition_Board_Manual.pdf
[44] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_354-v14_12Ch_Acqusisition_Board_Register_Map.pdf
[45] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3150-v9_12Ch_Acquisition_Board_Schematics_with_ECOs-v4.pdf
[46] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3150-v9_12Ch_Acquisition_Board_Gerbers.pdf
[47] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3150-v9_12Ch_Acquisition_Board_BOM.txt
[48] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3480-v7_12Ch_Acquisition_Transition_Board_V3_schematics_with_ECOs.pdf
[49] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3480-v7_12Ch_Acquisition_Transition_Board_V3_Gerber_08_11_2009_FN.ZIP
[50] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3480-v7_12CH_Acquisition_Board_BOM.txt
[51] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_1457-v2_12Ch_Acquisition_Board_Test_Procedures_v0_1.pdf
[52] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_1458-v1_12Ch_Acquisition_Board_Acceptance_Criteris_v0_0.pdf
[53] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_1992-v1_12CH_Acquisition_Board_TESTING_AUG08.ppt
[54] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4316-v2_12Channel_Acquisition_Board_Production_Test_Results.zip
[55] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4317-v1_12Channel_Acquisition_Transistion_Board_Production_Test_Results.zip
[56] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_3150-v9_12Ch_Acquisition_Board_changes.txt
[57] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_2836-v2_12Ch_Acquisitionl_Transition_Board_V3_changes.pdf
[58] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4345-v3_ECO1_DNL_Before_After.pdf
[59] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4346-v1_ECO2_Power_ON_BIAS_ENABLE_modification.pdf
[60] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4530-v1_ECO3_VSUB_SPIKE_modification.pdf
[61] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/12Ch_Acquisition_Board/DESDOC_4940-v1_ECO4_DAC_Range_restriction.pdf
[62] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_912-v3_12ACQT_Samtec_Cables.pdf
[63] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_912-v3_Connectors_used_on_Transition_Module_mec8_ra.pdf
[64] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_912-v3_Connectors_used_on_VIB_hsec8_dv.pdf
[65] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_912-v3_production_cable_purchase_order.pdf
[66] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_916-v7_Clock_Cable_Mechanical.pdf
[67] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_916-v7_Clock_Cables_Connectors_QSH_DP.pdf
[68] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_916-v7_Purchase_Order_production_cable_PO.pdf
[69] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_4208-v1_Integrated_Kapton_Cable_Schematic.pdf
[70] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_4210-v1_Kapton_Integrated_Cable_V3_PCB_Output_Gerber_11_16_2009.zip
[71] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Cables/DESDOC_4209-v1_Integrated_Kapton_Cable_V3_BOM.txt
[72] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_1215-v3_Clock_board_description_v3.pdf
[73] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2896-v8_CBB_v2.1_Schematic_with%20ECOs.pdf
[74] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2896-v8_CBB_v2.1_Gerbers.zip
[75] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2896-v8_CBB_v2.1_BOM.xls
[76] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2907-v5_CLOCKTRANS_V2.1_Schematic_with_ECOs.pdf
[77] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2907-v5_CBT_Gerbers_V2.1.rar
[78] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_6183-v2_Clock_GUIDER_Transition_module_schematics.pdf
[79] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_6183-v2_Clock_GUIDER_Transition_module_Gerbers.zip
[80] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_6183-v2_Clock_GUIDER_Transition_module_BOM.txt
[81] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_5359-v1_Production_Meeting_Clock_Board_Testing.ppt
[82] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_5359-v1_Clock_board_tests.doc
[83] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_5358-v1_CBB_production_tests.rar
[84] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2896-v8_CBB_V2.1_ECO.docx
[85] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Clock_and_Bias_Board/DESDOC_2907-v5_Clock%20V2.1_TRANS_ECO.docx
[86] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_DES_ICS_Interface_Host_Quick_Start_Guide_Ver6.0.pdf
[87] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_DES_ICS_Interface_Host_Users_Manual_Ver6.1.pdf
[88] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_ICC_Firmware_Description_PROD_ICC_REV3.3.pdf
[89] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PIC24_RegisterMapping_PROD_ICC_REV3.3.pdf
[90] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_Vicor_Fan_RPM_BOARD_V2.0_Design%20Info.pdf
[91] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_Vicor_Power_Supply_Power_Up_Down_Sequence_for_DAQ_Crate_RevD.pdf
[92] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_Vicor_Power_Supply_Power_Up_Down_Sequence_for_Heater_Crate_RevD.pdf
[93] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_Production_ICC_and_Cooling_Fan_BOM_Version_PROD_ICC_REV3.3.pdf
[94] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_ICC_BOARD_REV3.3_SCHEMATICS.pdf
[95] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_ICC_BOARD_REV3.1_Gerber_Files.zip
[96] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_ICC_BOARD_REV3.3_LAYERS.pdf
[97] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_4264-v1_ICC_Overvoltage_detection_Circuits.pdf
[98] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_FAN_LOAD_BOARD_V2.0_Schematic.pdf
[99] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_FAN_LOAD_BOARD_V2.0-Gerber_Files.zip
[100] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_FAN_LOAD_BOARD_V2.0_Layers.pdf
[101] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_Vicor_Fan_RPM_BOARD_V2.0_Schematics.pdf
[102] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_Vicor_Fan_RPM_BOARD_V2.0_Gerber_Files.zip
[103] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_PROD_Vicor_Fan_RPM_BOARD_V2.0_Layers.pdf
[104] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Controller/DESDOC_1527-v70_Production_ICC_Board_Checkout_V4.0.pdf
[105] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_DHE_Crate_Wiring_Rev3.0%20V2.pdf
[106] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_Crate_Hardware_BOM_Version_PROD_CRATE_WIRING_REV2_0.xls
[107] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_ICC%20Board_Connector_Connections_Type1_and_Type2.pdf
[108] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_ICC_Cables%26Connectors_BOM_Version_PROD_ICC_REV2_0.xls
[109] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_Cooling_Fan_Plenum_Connections_Type1_and_Type22.pdf
[110] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_2328-v33_Production_Power_Supply_Module_Connections_Type1_and_Type2.pdf
[111] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_5740-v1_AC_Power_Cord_Specification.pdf
[112] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_5739-v1_Grounding_Braid.pdf
[113] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Crate_Wiring/DESDOC_1154-v9_Analog_Backplane_Connectors_V9.pdf
[114] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_6026-v1_Heater_Controller_Crate_User_Manual.docx
[115] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_DECam_Heater_Controller_Final_Production_Revision_%232.ppt
[116] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_Heater%20Driver%20Board_10_13_2009.pdf
[117] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_Heater%20Driver%20Transition%20Board_10_13_2009.pdf
[118] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_Heater%20Patch%20Panel%20Board_10_13_2009.pdf
[119] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_Heater%20Patch%20Panel%20Transition%20Board_10_13_2009.pdf
[120] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_DECam%20Heater%20Driver%20Board_PCB_Output_Gerber_FN_10_13_2009.zip
[121] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_DECam%20Heater%20Driver%20Transition%20Board_PCB_Output_Gerber_FN_10_13_2009.zip
[122] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_DECam_Heater%20Patch%20Panel%20Board_PCB_Output_Gerber_FN_10_12_2009.zip
[123] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_DECam%20Heater%20Patch%20Panel%20Transition%20Board_PCB_Output_Gerber_FN_10_13_2009.zip
[124] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_HeaterDriverFrontPanel_mb-173708-2A.pdf
[125] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_HeaterDriverTransitionFrontPanel_mb173710-2a.pdf
[126] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_HeaterPatchPanelFrontPanel_MB-173709-2A.pdf
[127] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Heater_Controls/DESDOC_3706-v7_HeaterPatchPanelTransitionFrontPanel_MB-173711-2a.pdf
[128] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v7_MCB_v1.2_Manual.pdf
[129] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v7_MCB_v1.2_Registers.xls
[130] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_3642-v1_SLINK_Instalation_Instructions.pdf
[131] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_3642-v1_SLINK_Instalation_front_view_Before_MCB_Modifications.jpg
[132] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_3642-v1_SLINK_Instalation_front_view_After_MCB_Modifications.jpg
[133] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_3642-v1_SLINK_Instalation_back_view_After_MCB_Modifications.jpg
[134] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v7_MCBv1.2_Schematics_with_ECOs_v1.pdf
[135] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v7_MCBv1.2_Production_Gerber_Files.zip
[136] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v7_MCBv1_2_BOM.xls
[137] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/MCB%20Synchronization%20-%20Slave%20wiring.ppt
[138] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Master_Control_Board/DESDOC_4080-v_%20MCB_ECOs_Ver1.1.docx
[139] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Power_Supply/DESDOC_1380-v11_Vicor_Filtor_Box_Description_and_Construction_20090828.pdf
[140] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Power_Supply/DESDOC_1380-v11_Vicor_Filter_Box_Operating_and_Service_Manual.pdf
[141] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Power_Supply/DESDOC_4265-v1_Vicor_Quick_Reference_Guide_for_Low_Voltage_Supplies.pdf
[142] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Power_Supply/DESDOC_4674-v1_Vicor_Hardware_Power_Sequencer.pdf
[143] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/DECAM/Hardware/Power_Supply/DESDOC_6051-v1_Power_Distribution_Chassis_Hardware_description.pdf
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[408] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_ccdBrdTest.zip
[409] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_clkBrdTest.zip
[410] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_fred.zip
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[412] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_labTest.zip
[413] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_mcbBrdTest.zip
[414] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_mnsnBrdTest.zip
[415] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_mosaic1.zip
[416] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_NEWFIRM_Tucson.zip
[417] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_ota.zip
[418] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_pcmTest.zip
[419] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_qGde.zip
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[421] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Orange/SystemConfig/_quota_guide.zip
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[453] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/PSM/TRNT-3001_PSB.zip
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[469] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-4007_rC1.xls
[470] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-0007_rB_Asby.pdf
[471] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-1007_rB_FabDetl.pdf
[472] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-2007_rB1_Sch.pdf
[473] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-3007_rB_artwork.pdf
[474] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-4007_rB2_PrtLst.pdf
[475] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-0009_rA1_Asbly.pdf
[476] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-1009_rA_fab.pdf
[477] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-2009_rA2_SCH.pdf
[478] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-3009_rA.pdf
[479] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/NOAO-TRNT-1009.zip
[480] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-EL-04-4009_rA4_PrtLst.pdf
[481] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/TSM-CCD/TRNT-TS-01-0005_TSM-UTIL_Test_Procedure_Rev_0.pdf
[482] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-0005_rA_Asbly.PDF
[483] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-1005_rA_Fab.PDF
[484] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-2005_rA_Sch.PDF
[485] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/NOAO-TRNT-1005_rA.zip
[486] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-0006_rA_Asbly.pdf
[487] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-1006_rA_Fab.pdf
[488] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-2006_rA_Sch.pdf
[489] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/FLEX/TRNT-EL-04-3006_rA_Artwk.pdf
[490] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/CABLES/TRNT-EL-03-0001_CablePSM-util.pdf
[491] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/CABLES/TRNT-EL-03-0002_CableShutter_Preflash.pdf
[492] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/CABLES/TRNT-EL-03-0003_Ethernet_Shld_wire.pdf
[493] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Hardware/CABLES/TRNT-EL-03-0006_TSM%20Chassis%20GND%20Wire.pdf
[494] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/MNSN-AD-08-0005_MONSOON_Software_Setup_Rev_2.1.pdf
[495] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0001%20Software%20System%20Description%20Rev%200.pdf
[496] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0002%20borg%20R0.pdf
[497] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0006%20Software%20User%20Manual%20R0.pdf
[498] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0003%20Assimilate%20Rev1.2.pdf
[499] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0004_Torrent_Collector_Rev_1.1.pdf
[500] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT-AD-08-0012%20Torrent%20Sequencer%20Description%20R0.pdf
[501] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Software/TRNT_Assembler_Ver_6.zip
[502] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/Combined_Attribute_declarations_ver2.22_Rev2.pdf
[503] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/TRNT-AD-08-0011%20AFE%20Control%20Module%20Firmware%20R0.pdf
[504] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/Torrent%20LCB%20Firmware%20Design%20Rev%20C3.pdf
[505] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/WishBone%20Bus%20Specification%20From%20OpenCores%20wbspec_b3-1.pdf
[506] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/Clock%20Generation%20WorkBookV4%20.xls
[507] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/AFE%20Serial%20device%20control%20list.xls
[508] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/PowerSupplySyncAnalysis.xls
[509] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/TorrentFpga_Ver222.zip
[510] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/AFE_Control_Ver221.zip
[511] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/CFG_Services_Ver220.zip
[512] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/CLK_Services_Ver221.zip
[513] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/DummyModule_V220.zip
[514] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/LCB_Control_Ver222.zip
[515] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/PIX_Services_Ver221.zip
[516] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/PSM_Services_Ver221.zip
[517] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/CmdDecodeFifo.zip
[518] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/CommsDemuxPixBuffr_V106.zip
[519] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/I2C_InterfaceV100.zip
[520] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/I2C_Interface_V210.zip
[521] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/PixDataMuxFifo_V103.zip
[522] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/SeqPatMemCore.zip
[523] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/SeqProgMemCore.zip
[524] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/SerialFPDP_fifo_5v5.zip
[525] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/SyncPortFifo_V100.zip
[526] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/Uart_8.zip
[527] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/UartFifo.zip
[528] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/VideoFifo.zip
[529] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/Intercon_Ver222.zip
[530] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/WishBoneMasterInterfaceV106.zip
[531] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/WishBoneSlaveInterface_Ver207.zip
[532] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Firmware/NOAO_tblock.zip
[533] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1001%20CARD%20GUIDE%20MOUNT.pdf
[534] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1002%20CONTROLLER%20BOTTOM%20PLATE.pdf
[535] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1003B%20CONTROLLER%20REAR%20PANEL.pdf
[536] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1004A%20CONTROLLER%20FRONT%20PANEL.pdf
[537] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1005%20CONTROLLER%20CROSS%20RAIL%20RIGHT.pdf
[538] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1006%20CONTROLLER%20CROSS%20RAIL%20LEFT.pdf
[539] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1007B%20CONTROLLER%20REAR%20PANEL%20INSERT.PDF
[540] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1008B%20CONTROLLER%20COVER.pdf
[541] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1010B%20PSM%20ENCLOSURE%20BASE.PDF
[542] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1011%20PSM%20ENCLOSURE%20BOTTOM%20COVER.pdf
[543] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1012A%20PSM%20ENCLOSURE%20FILL%20PLATE.pdf
[544] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1013%20CONTROLLER%20SUPPORT%20RAIL%20SPACER.pdf
[545] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1016%20CONTROLLER%20PCB%20SUPPORT%20RAIL%20REAR.PDF
[546] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1017%20CONTROLLER%20PCB%20SUPPORT%20RAIL%20FRONT.PDF
[547] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1019A%20CONTROLLER%20EMI%20PLATE.pdf
[548] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1020%20DHE%20MOUNTING%20TAB.PDF
[549] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1021B%20TRANSITION%20MODULE%20BASE%20PLATE.pdf
[550] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1022B%20TRANSITION%20MODULE%20ISOLATION%20CONNECTOR%20PLATE.pdf
[551] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1023C%20TRANSITION%20MODULE%20ISOLATION%20RAIL.pdf
[552] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1024A%20TRANSITION%20MODULE%20BASE%20HEADER.pdf
[553] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1025B%20TRANSITION%20MODULE%20SIDE%20PLATE%2C%20LEFT.pdf
[554] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1026B%20TRANSITION%20MODULE%20SIDE%20PLATE%2C%20RIGHT.PDF
[555] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1027A%20TRANSITION%20MODULE%20UTILITY%20BOARD%20HEADER.PDF
[556] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1028B%20TRANSITION%20MODULE%20BASE%20TOP%20COVER%20PLATE%20TAB.pdf
[557] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1029A%20TRANSITION%20MODULE%20BASE%20FRONT%20COVER.pdf
[558] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1030A%20TRANSITION%20MODULE%20BASE%20TOP%20COVER.PDF
[559] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1031%20ETHERNET%20BOARD%20STANDOFF.PDF
[560] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1032%20ETHERNET%20BOARD%20COVER.PDF
[561] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1034B%20Hex%20Jam%20Nut%20.688-24.pdf
[562] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1035B%20Hex%20Jam%20Nut%201.063-18.pdf
[563] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1036A%20Hex%20Jam%20Nut%201.188-18.pdf
[564] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1037A_FINNED%20_BLWR_HSG.pdf
[565] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Mechanical/TRNT-EL-02-1038_HSG_CVR.pdf
[566] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0000%20Blank%20Dewar%20Interface%20kit%20Rev%20-0D-.pdf
[567] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0014%20Transition%20Module%20Base%20Kit%20Rev%20-0D-.pdf
[568] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0015%20KPNO%20Dewar%20Connector%20Plate%20Kit%20Rev%20-0D-.pdf
[569] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0016%20CCD%20Flex%20Cable%20Kit%20Rev%20-0D-.pdf
[570] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0017%20LCB%20Kit%20Rev%20-0D-.pdf
[571] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0018%20Controller%20Base%20Kit%20Rev%20-0D-.pdf
[572] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0020%20External%20Connector%20Kit%20Rev%20-0D-.pdf
[573] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0021%20TSM%20Covers%20Kit%20Rev%20-0D-.pdf
[574] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0022%20Controller%20Cover%20Kit%20Rev%20-0D-.pdf
[575] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0001A%20DETECTOR%20HEAD%20ELECTRONICS.pdf
[576] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0002B%20CONTROLLER%20ASSEMBLY.pdf
[577] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0003C%20TRANSITION%20MODULE%20ASSEMBLY.pdf
[578] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0004B%20POWER%20SUPPLY%20MODULE.pdf
[579] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0005A%20CCD%20PREAMP%20TRANSITION%20BOARD.pdf
[580] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0006B%20TRANSITION%20MODULE%20CHASSIS.pdf
[581] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0007B%20BLOWER%20HOUSING.pdf
[582] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0008A%20CONTROLLER%20MODULE%20CHASSIS.pdf
[583] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0009%20CONTROLLER%20MODULE%20PCB%20MOUNT%20REAR.pdf
[584] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0010%20CONTROLLER%20MODULE%20PCB%20MOUNT%20FRONT.pdf
[585] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/Manufacturing/TRNT-EL-02-0011A%20ETHERNET%20BOARD%20ASSEMBLY.pdf
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[591] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/EngineeringChangeOrders/ECOFORM%20TEMPLATE.doc
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[595] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/EngineeringChangeOrders/TRNT-003.pdf
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[598] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/EngineeringChangeOrders/TRNT-006.pdf
[599] http://www.ctio.noao.edu/noao/sites/default/files/instruments/Controllers/MONSOON/Technical_Documents/Torrent/EngineeringChangeOrders/TRNT-007.pdf
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